參數(shù)資料
型號(hào): HI5731
廠商: Intersil Corporation
英文描述: 12-Bit, 100 MSPS, High Speed D/A Converter
中文描述: 12位,100 MSPS的,高速D / A轉(zhuǎn)換
文件頁(yè)數(shù): 11/15頁(yè)
文件大?。?/td> 370K
代理商: HI5731
3-11
faster than the turn on time (TTL designs). Unequal delay
paths through the device can also cause one current source
to change before another. In order to minimize this, the
Intersil HI5731 employes an internal register, just prior to the
current sources, which is updated on the clock edge. Lastly,
the worst case glitch on traditional D/A converters usually
occurs at the major transition (i.e., code 2047 to 2048).
However, due to the split architecture of the HI5731, the
glitch is moved to the 255 to 256 transition (and every
subsequent 256 code transitions thereafter). This split R/2R
segmented current source architecture, which decreases the
amount of current switching at any one time, makes the
glitch practically constant over the entire output range. By
making the glitch a constant size over the entire output
range this effectively integrates this error out of the end
application.
In measuring the output glitch of the HI5731 the output is
terminated into a 64
load. The glitch is measured at any
one of the current cell carry (code 255 to 256 transition or
any multiple thereof) throughout the DACs output range.
The glitch energy is calculated by measuring the area under
the voltage-time curve. Figure 26 shows the area considered
as glitch when changing the DAC output. Units are typically
specified in picoVolt-seconds (pV-s).
Applications
Bipolar Applications
To convert the output of the HI5731 to a bipolar 4V swing,
the following applications circuit is recommended. The
reference can only provide 125
μ
A of drive, so it must be
buffered to create the bipolar offset current needed to
generate the -2V output with all bits ‘off’. The output current
must be converted to a voltage and then gained up and
offset to produce the proper swing. Care must be taken to
compensate for the voltage swing and error.
Interfacing to the HSP45106 NCO-16
The HSP45106 is a 16-bit, Numerically Controlled Oscillator
(NCO). The HSP45106 can be used to generate various
modulation schemes for Direct Digital Synthesis (DDS)
applications. Figure 28 shows how to interface an HI5731 to
the HSP45106.
Interfacing to the HSP45102 NCO-12
The HSP45102 is a 12-bit, Numerically Controlled Oscillator
(NCO). The HSP45102 can be used to generate various
modulation schemes for Direct Digital Synthesis (DDS)
applications. Figure 29 shows how to interface an HI5731 to
the HSP45102.
This high level block diagram is that of a basic PSK
modulator. In this example the encoder generates the PSK
waveform by driving the Phase Modulation Inputs (P1, P0) of
the HSP45102. The P1-0 inputs impart a phase shift to the
carrier wave as defined in Table 2.
The data port of the HSP45102 drives the 12-bit HI5731
DAC which converts the NCO output into an analog
waveform. The output filter connected to the DAC can be
tailored to remove unwanted spurs for the desired carrier
frequency. The controller is used to load the desired center
frequency and control the HSP45102. The HI5731 coupled
with the HSP45102 make an inexpensive PSK modulator
with Spurious Free performance down to -76dBc.
(21) I
OUT
100MHz
LOW PASS
FILTER
SCOPE
HI5731
64
50
FIGURE 25. GLITCH TEST CIRCUIT
FIGURE 26. MEASURING GLITCH ENERGY
a
(mV)
t
(ns)
GLITCH ENERGY = (
a
x
t
)/2
TABLE 3. PHASE MODULATION INPUT CODING
P1
P0
PHASE SHIFT (DEGREES)
0
0
0
0
1
90
1
0
270
1
1
180
HI5731
REF OUT
I
OUT
(21)
1
/
2
CA2904
+
-
+
-
+
-
50
5k
1
/
2
CA2904
5k
60
240
240
HFA1100
V
OUT
0.1
μ
F
FIGURE 27. BIPOLAR OUTPUT CONFIGURATION
(26)
HI5731
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