FIGURE 12. SFDR vs f
參數(shù)資料
型號: HI5741BIBZ
廠商: Intersil
文件頁數(shù): 11/13頁
文件大小: 0K
描述: DAC 14BIT 100MHZ 5.2V 28-SOIC
標準包裝: 26
設(shè)置時間: 20ns
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 650mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 100M
7
FN4071.12
September 20, 2006
FIGURE 10. SFDR vs CLOCK FREQUENCY
FIGURE 11. SFDR vs CLOCK FREQUENCY
FIGURE 12. SFDR vs fOUT
FIGURE 13. SFDR vs fOUT
FIGURE 14. SFDR vs fOUT
FIGURE 15. HARMONIC DISTORTION vs CLOCK FREQUENCY
Typical Performance Curves (Continued)
50
fCLK (MSPS)
90
85
80
75
70
65
60
(d
B
c)
60 70 80 90 100
40
30
20
10
fOUT = (1/10) fCLK
50
fCLK (MSPS)
90
85
80
75
70
65
60
(d
B
c)
60 70 80 90100
40
30
20
10
fOUT = (1/5) fCLK
fOUT (MSPS)
82
80
76
68
66
64
62
(dBc)
10
5
1
74
72
70
fCLK = 50 MSPS
fOUT (MHz)
82
80
76
68
66
64
62
(dBc)
10
5
1
74
72
70
15
fCLK = 75 MSPS
78
fOUT (MHz)
80
78
76
68
66
64
62
(d
B
c)
10
5
1
74
72
70
15
fCLK = 100 MSPS
20
50
fCLK (MSPS)
-72
-74
-76
-78
-80
-82
-86
(dBc)
60 70 80 90100
40
30
20
10
-84
fOUT = 2.03MHz
3RD HARMONIC
2ND HARMONIC
HI5741
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