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參數資料
| 型號： | HI9P5701K-5 |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | 6-Bit, 30MSPS, Flash A/D Converter |
| 中文描述： | 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO18 |
| 封裝： | SOIC-18 |
| 文件頁數： | 1/14頁 |
| 文件大?。?/td> | 151K |
| 代理商： | HI9P5701K-5 |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
HI-5701
6-Bit, 30MSPS, Flash A/D Converter
The HI-5701 is a monolithic, 6-bit, CMOS flash Analog-to-
Digital Converter. It is designed for high speed applications
where wide bandwidth and low power consumption are
essential. Its 30MSPS speed is made possible by a parallel
architecture which also eliminates the need for an external
sample and hold circuit. The HI-5701 delivers
±
0.7 LSB
differential nonlinearity while consuming only 250mW (Typ)
at 30MSPS. Microprocessor compatible data output latches
are provided which present valid data to the output bus 1.5
clock cycles after the convert command is received. An
overflow bit is provided to allow the series connection of two
converters to achieve 7-bit resolution.
The HI-5701 is available in Commercial and Industrial
temperature ranges and is supplied in 18 lead Plastic DIP
and SOIC packages
Features
30MSPS with No Missing Codes
Full Power Input Bandwidth . . . . . . . . . . . . . . . . . . 20MHz
No Missing Codes Over Temperature
Sample and Hold Not Required
Single Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . +5V
Power Dissipation (Max). . . . . . . . . . . . . . . . . . . . .300mW
CMOS/TTL Compatible
Overflow Bit
/883 Version Available
Applications
Video Digitizing
Radar Systems
Communication Systems
High Speed Data Acquisition Systems
Pinout
HI-5701
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HI3-5701K-5
0 to 70
18 Ld PDIP
E18.3
HI9P5701K-5
0 to 70
18 Ld SOIC
M18.3
HI3-5701B
-
9
-40 to 85
18 Ld PDIP
E18.3
HI9P5701B
-
9
-40 to 85
18 Ld SOIC
M18.3
HI5701-EV
25
Evaluation Board
10
11
12
13
14
15
16
17
18
9
8
7
6
5
4
3
2
1
D4
1
/
2
R
D2
D1
D0 (LSB)
V
DD
V
IN
D3
V
REF
-
D5 (MSB)
OVF
V
SS
NC
CE2
CE1
PHASE
CLK
V
REF
+
Data Sheet
June 1999
File Number
2937.8
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