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| 型號： | HIF_SPEC |
| 英文描述： | EZ-030 Demonstration Board Theory of Operation Host Interface (HIF) Specification |
| 中文描述： | 易- 030演示板的經(jīng)營理論主機接口（誘導(dǎo)因子）規(guī)格 |
| 文件頁數(shù)： | 77/118頁 |
| 文件大?。?/td> | 356K |
| 代理商： | HIF_SPEC |
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Host Interface (HIF) Specification
3–53
Service 274 – cycles
Return Processor Cycles
Description
This service returns an ascending positive number in registers
gr96
and
gr97
that is the number of processor cycles that have elapsed since the last processor
initialization was applied to the CPU. It provides a mechanism for user
programs to access the contents of the internal Am29000 processor timer
counter register. The cycle count can be multiplied by the speed of the
processor clock to convert it to a time value.
gr97
will contain the most
significant bits of the cycle count, while
gr96
will contain the least significant
bits. HIF implementations of this service are required to provide a cycle count
with a minimum of 42 bits of precision.
The implementor of this HIF service must, as best possible, eliminate system
I/O data transfer time incurred by HIF services with service numbers less than
256. This will benefit the user when using this service to perform benchmarks
across different hardware platforms. The user of this service should be aware
that the return value may still contain cycles used in support of operating
system tasks.
Register Usage
Type
Regs
Contents
Description
Calling:
gr121
274 (0x112)
Service number
Returns:
gr96
cycles
Success: Bits 0–31 of processor
cycles
Failure: = 0 (in both gr96and gr97)
gr97
cycles
Success: Bits 32 and higher of
processor cycles
Failure: = 0 (in both gr96and gr97)
gr121
0x80000000
errcode
Logical TRUE, service successful
Error number, service not successful
(implementation dependent)
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