參數(shù)資料
型號(hào)： HIP6501EVAL1
廠(chǎng)商： Intersil Corporation
元件分類(lèi)： 基準(zhǔn)電壓源/電流源
英文描述： Triple Linear Power Controller with ACPI Control Interface
中文描述： 三線(xiàn)性電源控制器ACPI控制接口
文件頁(yè)數(shù)： 10/14頁(yè)
文件大?。?/td> 140K
代理商： HIP6501EVAL1
10
Application Guidelines
Soft-Start Interval
The 5VSB output of a typical ATX supply is capable of
725mA. During power-up in a sleep state, it needs to provide
sufficient current to charge up all the output capacitors and
simultaneously provide some amount of current to the output
loads. Drawing excessive amounts of current from the 5VSB
output of the ATX can lead to voltage collapse and induce a
pattern of consecutive restarts with unknown effects on the
system’s behavior or health.
The built-in soft-start circuitry allows tight control of the slew-
up speed of the output voltages controlled by the HIP6501A,
thus enabling power-ups free of supply drop-off events.
Since the outputs are ramped up in a linear fashion, the
current dedicated to charging the output capacitors can be
calculated with the following formula:
, where
I
SS
- soft-start current (typically 10
μ
A)
C
SS
- soft-start capacitor
V
BG
- bandgap voltage (typically 1.26V)
Σ
(
C
OUT
xV
OUT
) - sum of the products between the
capacitance and the voltage of an output.
Due to the various system timing events, it is recommended
that the soft-start interval not be set to exceed 30ms.
Additionally, the recommended soft-start capacitor range
spans from 5nF up to 0.22
μ
F (0.1
μ
F recommended).
Shutdown
In case of a FAULT condition that might endanger the
computer system, or at any other time, the HIP6501A can be
shut down by pulling the SS pin below the specified
shutdown level (typically 0.8V) with an open drain or open
collector device capable of sinking a minimum of 2mA.
Pulling the SS pin low effectively shuts down all the pass
elements. Upon release of the SS pin, the HIP6501A
undergoes a new soft-start cycle and resumes normal
operation in accordance to the ATX supply and control pins
status.
Layout Considerations
The typical application employing a HIP6501A is a fairly
straight-forward implementation. Similar to any other linear
regulators, attention has to be paid to a few potentially
sensitive small signal components, such as those connected
to high-impedance nodes or those supplying critical by-pass
currents.
The power components (pass transistors) and the controller
IC should be placed first. The controller should be placed in
a central position on the motherboard, closer to the memory
load if possible. Ensure the VSEN2 connection is properly
sized to carry 200mA without significant resistive losses. The
pass transistors should be placed on pads capable of
heatsinking, matching the device’s power dissipation. Where
applicable, multiple via connections to a large internal plane
can significantly lower localized device temperature rise.
Placement of the decoupling and bulk capacitors should
follow a placement reflecting their purpose. As such, the
high-frequency decoupling capacitors (C
HF
) should be
placed as close as possible to the load they are decoupling;
the ones decoupling the controller (C
12V
, C
5VSB
) close to
the controller pins, the ones decoupling the load close to the
load connector or the load itself (if embedded). The bulk
-
FIGURE 11. 2.5/3.3V
MEM
OUTPUT VOLTAGE SELECTION
CIRCUITRY DETAILS
FAULT/MSEL
40
μ
A
MEM VOLTAGE
SELECT COMP
R
SEL
R
SEL
V
MEM
1k
10k
2.5V
3.3V
+
-
0.2V
ICOUT
VBG
CSS
Σ
COUT
VOUT
×
(
)
×
=
FIGURE 12. PRINTED CIRCUIT BOARD ISLANDS
V
OUT1
Q1
Q2
Q3
Q4
C
SS
+12V
IN
+5V
SB
C
IN
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
C
BULK2
HIP6501A
C
12V
V
OUT2
V
OUT3
SS
GND
VSEN2
5VDLSB
DRV2
3V3DLSB
KEY
12V
5VSB
DLA
Q5
C
BULK1
C
BULK3
C
5VSB
L
C
HF1
C
HF3
5VDL
+5V
IN
C
HF2
+3.3V
IN
3V3DL
L
L
HIP6501A
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