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參數(shù)資料
| 型號： | HIP9011ABZT |
| 廠商： | Intersil |
| 文件頁數(shù)： | 5/11頁 |
| 文件大小： | 0K |
| 描述： | IC SENSOR ENGINE KNOCK 20-SOIC |
| 標準包裝： | 1,000 |
| 類型： | 引擎敲擊信號處理器 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | SPI |
| 電流 - 電源： | 8mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC |
| 包裝： | 帶卷 (TR) |
3
FN4367.2
January 6, 2006
Absolute Maximum Ratings
Thermal Information
DC Logic Supply, VDD . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7.0V
Output Voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7.0V
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V Max
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 125oC
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
Maximum Power Dissipation, PD
For TA = -40oC to 70oC . . . . . . . . . . . . . . . . . . . . . . . 400mW Max
For TA = 70oC to 125oC, Derate Linearly at . . . . . . . . . . 6mW/oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range, TSTG . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
At a Distance 1/16
±1/32 inch, (1.59 ±0.79mm) from Case for
10s Max. (SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VDD = 5V ±5%, GND = 0V, Clock Frequency 4MHz ±0.1%, TA = -40
oC to 125oC,
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC ELECTRICAL SPECIFICATIONS
Quiescent Supply Current
IDD
VDD = 5.25V, GND = 0V
-
5.0
8.0
mA
Midpoint Voltage, Pin 3
VMID
VDD = 5.0V, IL = 2mA Source
2.3
2.45
2.55
V
Midpoint Voltage, Pin 3
VMID
VDD = 5.0V, IL = 0mA
2.4
2.5
2.6
V
Low Input Voltage, Pins INT/HOLD, CS, SI, SCK
VIL
-
30
% of VDD
High Input Voltage, Pins INT/HOLD, CS, SI, SCK
VIH
70
-
% of VDD
Hysteresis voltage, Pins INT/HOLD, CS, SI, SCK
VHYST
0.85
-
V
Internal Pull-Up Current
I Source CS, SI,
SCK, TEST
VDD = 5.0V, Measured at GND
-
50
-
A
Internal Pull-Down Current
I Sink,
INT/HOLD
VDD = 5.0V, Measured at VDD
--50
-
A
Low Level Output, Pin SO
VOL
ISOURCE = 1.6mA, VDD = 5.0V
0.01
-
0.30
V
High Level Output, Pin SO
VOH
ISINK = 200A, VDD = 5.0V
4.8
4.9
5.0
V
Three-State Leakage Pin SO
IL
Measured at GND; VDD = 5.0V
-
±10
A
Low Level Output, Pin 10, OSCOUT
VOL
ISOURCE = 500A; VDD = 5.0V
-
1.5
V
High Level Output, Pin 10, OSCOUT
VOH
ISINK = -500A; VDD = 5.0V
4.4
-
V
SPI BUS INTERFACE AC Parametrics
CS Falling to SCLK Rising
tCCH
10
-
ns
CS Rising to SCLK Falling
tCCL
80
-
ns
SCLK Low
tPWL
60
-
ns
SCLK High
tPWH
60
-
ns
SCLK Falling to CS Rising
tSCCH
60
-
ns
Data High Setup Time
tSUH
20
-
ns
Data Low Setup Time
tSUL
20
-
ns
Data High Hold Time
tHH
10
-
ns
Data Low Hold Time
tHL
10
-
ns
Min Time Between 2 Programmed Words
tCSH
200
-
ns
CS Rising to INT/Hold Rising
tCIH
8-
-
s
HIP9011
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