參數(shù)資料
型號: HM5117805LJ-6
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 16 M EDO DRAM (2-Mword X 8-bit) 2 k Refresh
中文描述: 2M X 8 EDO DRAM, 60 ns, PDSO28
封裝: 0.400 INCH, PLASTIC, SOJ-28
文件頁數(shù): 6/32頁
文件大?。?/td> 497K
代理商: HM5117805LJ-6
EO rdc
HM5117805 Series
Data Sheet E0156H10
6
DC Characteristics
(Ta = 0 to +70°C, V
CC
= 5 V ± 10%, V
SS
= 0 V)
HM5117805
-5
-6
-7
Parameter
Symbol
Min Max Min Max Min Max Unit
Test conditions
Operating current*
1,
*
2
I
CC1
I
CC2
110 —
100 —
90
mA
t
RC
= min
TTL interface
RAS
,
CAS
= V
IH
Dout = High-Z
Standby current
2
2
2
mA
1
1
1
mA
CMOS interface
RAS
,
CAS
V
CC
– 0.2 V
Dout = High-Z
Standby current
(L-version)
I
CC2
150 —
150 —
150 μA
CMOS interface
RAS
,
CAS
V
CC
– 0.2 V
Dout = High-Z
RAS
-only refresh current*
2
I
CC3
I
CC5
110 —
100 —
90
mA
t
RC
= min
RAS
= V
IH
CAS
= V
IL
Dout = enable
Standby current*
1
5
5
5
mA
CAS
-before-
RAS
refresh
current
I
CC6
110 —
100 —
90
mA
t
RC
= min
EDO page mode
current*
1,
*
3
I
CC7
100 —
90
85
mA
t
HPC
= min
Battery backup current*
4
(Standby with CBR refresh)
(L-version)
I
CC10
500 —
500 —
500 μA
CMOS interface
Dout = High-Z
CBR refresh:
t
RC
= 62.5 μs
t
RAS
0.3 μs
CMOS interface
RAS
,
CAS
0.2V
Dout = High-Z
Self refresh mode current
(L-version)
I
CC11
300 —
300 —
300 μA
Input leakage current
I
LI
I
LO
–10 10
–10 10
–10 10
μA
0 V
Vin
7 V
0 V
Vout
7 V
Dout = disable
Output leakage current
–10 10
–10 10
–10 10
μA
Output high voltage
V
OH
V
OL
2.4
V
CC
0.4
2.4
V
CC
0.4
2.4
V
CC
0.4
V
High Iout = –2 mA
Output low voltage
Notes: 1. I
CC
depends on output load condition when the device is selected. I
CC
max is specified at the output
open condition.
2. Address can be changed once or less while
RAS
= V
IL
.
3. Address can be changed once or less while
CAS
= V
IH
.
4.
CAS
= L (
0.2 V) while
RAS
= L (
0.2 V).
0
0
0
V
Low Iout = 2 mA
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