參數(shù)資料
型號: HM5259405B-75
廠商: Elpida Memory, Inc.
元件分類: 圓形連接器
英文描述: Circular Connector; Body Material:Aluminum; Series:PT06; No. of Contacts:30; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Circular Contact Gender:Socket; Insert Arrangement:18-30
中文描述: 512M LVTTL接口SDRAM的133 MHz/100 MHz的8 Mword】16位】4-bank/16-Mword】8位】4銀行/ 32 Mword】4位】4銀行PC/133,電腦/ 100內存
文件頁數(shù): 11/63頁
文件大?。?/td> 368K
代理商: HM5259405B-75
HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
11
Column address strobe and write command [WRIT]:
This command starts a write operation. When the
burst write mode is selected, the column address (AY0 to AY9; HM5259165B, AY0 to AY9, AY11;
HM5259805B, AY0 to AY9, AY11, AY12; HM5259405B) and the bank select address (BA0/BA1) become
the burst write start address. When the single write mode is selected, data is only written to the location
specified by the column address (AY0 to AY9; HM5259165B, AY0 to AY9, AY11; HM5259805B, AY0 to
AY9, AY11, AY12; HM5259405B) and the bank select address (BA0/BA1).
Write with auto-precharge [WRIT A]:
This command automatically performs a precharge operation after a
burst write with a length of 1, 2, 4 or 8, or after a single write operation.
Row address strobe and bank activate [ACTV]:
This command activates the bank that is selected by
BA0/BA1 (BS) and determines the row address (AX0 to AX12). When BA0 and BA1 are Low, bank 0 is
activated. When BA0 is Low and BA1 is High, bank 1 is activated. When BA0 is High and BA1 is Low,
bank 2 is activated. When BA0 and BA1 are High, bank 3 is activated.
Precharge selected bank [PRE]:
This command starts precharge operation for the bank selected by
BA0/BA1. If BA0 and BA1 are Low, bank 0 is selected. If BA0 is Low and BA1 is High, bank 1 is selected.
If BA0 is High and BA1 is Low, bank 2 is selected. If BA0 and BA1 are High, bank 3 is selected.
Precharge all banks [PALL]:
This command starts a precharge operation for all banks.
Refresh [REF/SELF]:
This command starts the refresh operation. There are two types of refresh operation,
the one is auto-refresh, and the other is self-refresh. For details, refer to the CKE truth table section.
Mode register set [MRS]:
The SDRAM has a mode register that defines how it operates. The mode register
is specified by the address pins (A0 to BA0 and BA1) at the mode register set cycle. For details, refer to the
mode register configuration. After power on, the contents of the mode register are undefined, execute the
mode register set command to set up the mode register.
相關PDF資料
PDF描述
HM5259805B-A6 PT 32C 32#20 PIN PLUG
HM5264405D 64M LVTTL interface SDRAM(64M LVTTL接口同步DRAM)
HM5264165D 64M LVTTL interface SDRAM(64M LVTTL接口同步DRAM)
HM5264805D 64M LVTTL interface SDRAM(64M LVTTL接口同步DRAM)
HM5264405F 64M LVTTL interface SDRAM(64M LVTTL接口同步DRAM)
相關代理商/技術參數(shù)
參數(shù)描述
HM5259405B-A6 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5259405BTD-75 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5259405BTD-A6 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5259805B-75 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5259805B-A6 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM