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參數(shù)資料
| 型號(hào)： | HM62256ALSP-8SL |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Triple 3-Input Positive-NAND Gates 14-CDIP -55 to 125 |
| 中文描述： | 32,768字× 8位高速CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 8/11頁(yè) |
| 文件大?。?/td> | 71K |
| 代理商： | HM62256ALSP-8SL |
Read Timing Waveform (3)
*3 *5 *6
Write Cycle
HM62256A-8
—————– —————– —————– —————–
Min
Max
Min
Max
HM62256A-10 HM62256A-12 HM62256A-15
Parameter
———————————————————————————————————————————————–
Write cycle time
t
WC
85
—
100
———————————————————————————————————————————————–
Chip selection to
t
CW
75
—
80
end of write
———————————————————————————————————————————————–
Address setup time
t
AS
0
—
0
———————————————————————————————————————————————–
Address valid to
t
AW
75
—
80
end of write
———————————————————————————————————————————————–
Write pulse width
t
WP
55
—
60
———————————————————————————————————————————————–
Write recovery time
t
WR
0
—
0
———————————————————————————————————————————————–
WE
to output in high-Z
t
WHZ
0
30
0
———————————————————————————————————————————————–
Data to write time
t
DW
40
—
40
overlap
———————————————————————————————————————————————–
Data hold from
t
DH
0
—
0
write time
———————————————————————————————————————————————–
Output active from
t
OW
5
—
5
end of write
———————————————————————————————————————————————–
Output disable to
t
OHZ
0
30
0
output in high-Z
———————————————————————————————————————————————–
Symbol
Min
Max
Min
Max
Unit
Note
—
120
—
150
—
ns
—
85
—
100
—
ns
2
—
0
—
0
—
ns
3
—
85
—
100
—
ns
—
70
—
90
—
ns
1
—
0
—
0
—
ns
4
35
0
40
0
50
ns
10
—
50
—
60
—
ns
—
0
—
0
—
ns
—
5
—
5
—
ns
10
35
0
40
0
50
ns
10, 11
t
ACS
t
CLZ
t
CHZ
Dout
CS
Valid Data
*2
*1,*2
Notes: 1.
t
CHZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit
conditions and are not referenced to output voltage levels.
This parameter is sampled and not 100% tested.
WE
is high for read cycle.
Device is continuously selected,
CS
= V
IL
.
Address Valid prior to or coincident with
CS
transition Low.
OE
= V
IL
.
2.
3.
4.
5.
6.
8
HM62256A Series
HM62256A Series
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM62256ALR-10 | 32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-10SL | 32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-12 | 10CKT R/A B-B HOUS ASSY RoHS Compliant: Yes |
| HM62256ALR-12SL | 32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-15 | 524352272 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM62256ALT-10 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALT-10SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALT-12 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALT-12SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALT-15 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
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