參數(shù)資料
型號(hào)： HM62G36256
廠商： Hitachi,Ltd.
英文描述： 8M Synchronous Fast Static RAM(256k-word x 36-bit)
中文描述： 分同步快速靜態(tài)存儲(chǔ)器（256k字× 36位）
文件頁(yè)數(shù)： 5/24頁(yè)
文件大?。?/td> 137K
代理商： HM62G36256
HM62G36256 Series
5
Operation Table
ZZ
SS G
SWE
SWEa SWEb SWEc SWEd
K
K
Operation
DQ (n)
DQ (n + 1)
H
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
sleep mode
High-Z
High-Z
L
H
L-H H-L Dead
(not selected)
×
High-Z
L
×
H
×
×
×
×
×
×
×
Dead
(Dummy read)
High-Z
High-Z
L
L
L
H
×
×
×
×
L-H H-L Read
×
Dout
(a,b,c,d)0-8
L
L
×
L
L
L
L
L
L-H H-L Write a, b, c, d
byte
High-Z
Din (a,b,c,d)0-8
L
L
×
L
H
L
L
L
L-H H-L Write b, c, d
byte
High-Z
Din (b,c,d)0-8
L
L
×
L
L
H
L
L
L-H H-L Write a, c, d
byte
High-Z
Din (a,c,d)0-8
L
L
×
L
L
L
H
L
L-H H-L Write a, b, d
byte
High-Z
Din (a,b,d)0-8
L
L
×
L
L
L
L
H
L-H H-L Write a, b, c
byte
High-Z
Din (a,b,c)0-8
L
L
×
×
×
×
×
×
×
×
L
H
H
L
L
L-H H-L Write c, d byte High-Z
Din (c,d)0-8
L
L
L
L
H
H
L
L-H H-L Write a, d byte High-Z
Din (a,d)0-8
L
L
L
L
L
H
H
L-H H-L Write a, b byte High-Z
Din (a,b)0-8
L
L
L
H
L
L
H
L-H H-L Write b, c byte High-Z
Din (b,c)0-8
L
L
L
H
H
H
L
L-H H-L Write d byte
High-Z
Din (d)0-8
L
L
L
H
H
L
H
L-H H-L Write c byte
High-Z
Din (c)0-8
L
L
L
H
L
H
H
L-H H-L Write b byte
High-Z
Din (b)0-8
L
Notes: 1.
×
means don’t care for synchronous inputs, and H or L for asynchronous inputs.
2.
SWE
,
SS
,
SWEa
to
SWEd
, SA are sampled at the rising edge of K clock.
3. Although differential clock operation is implied, this SRAM will operate properly with one clock
phase (either K or
K
) tied to V
. Under such single-ended clock operation, all parameters
specified within this document will be met.
L
L
L
H
H
H
L-H H-L Write a byte
High-Z
Din (a)0-8
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