參數(shù)資料
型號(hào): HM62G36256BP-5
廠商: Hitachi,Ltd.
英文描述: 8M Synchronous Fast Static RAM(256k-word x 36-bit)
中文描述: 分同步快速靜態(tài)存儲(chǔ)器(256k字× 36位)
文件頁數(shù): 21/24頁
文件大小: 137K
代理商: HM62G36256BP-5
HM62G36256 Series
21
Notes: 1. Bit number1 is the first scan bit to exit the chip.
2. The NC pads listed in this table are indeed no connects, but are represented in the boundary
scan register by a “Place Holder”. Placeholder registers are internally connected to V
SS
.
3. In Boundary scan mode, differential input K and
K
are referred to each other and must be at
opposite logic levels for reliable operation.
4. ZZ must remain at V
IL
during boundary scan.
5. In boundary scan mode, ZQ must be driven to V
DDQ
or V
SS
supply rail to ensure consistent results.
6. M1 and M2 must be driven to V
DD
or V
SS
supply rail to ensure consistent results.
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