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參數(shù)資料
| 型號： | HM62V8512BLRR-8UL |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | SRAM |
| 英文描述： | 4 M SRAM (512-kword x 8-bit) |
| 中文描述： | 四米的SRAM（512 - KWord的× 8位） |
| 文件頁數(shù)： | 17/17頁 |
| 文件大?。?/td> | 77K |
| 代理商： | HM62V8512BLRR-8UL |
HM62V8512B Series
17
Revision Record
Rev.
Date
Contents of Modification
Drawn by
Approved by
0.0
Apr. 24, 1998
Initial issue
M. Higuchi
K. Imato
0.1
Nov. 19, 1998
DC Characteristics
I
CC1
max: 30 mA to 40 mA
I
max: 20/2
μ
A to 40/20
μ
A
Low V
Data Retention Characteristics
I
max: 10/1
μ
A to 20/10
μ
A
Change of note1 and 2
S. Kunito
K. Imato
1.0
Dec. 17, 1998
Deletion of Preliminary
Features
Change of Power dissipation
Active: TBD (typ) to 15 mW/MHz (typ)
Standby: TBD (typ) to 3
μ
W (typ)
DC Characteristics
I
CC2
typ: TBD to 5 mA
I
typ: TBD/TBD to 1/1
μ
A
Low V
Data Retention Characteristics
I
CCDR
typ: TBD/TBD to 0.8/0.8
μ
A
Low V
Data Retention Characteristics
Change of Low V
CC
Data Retention Timmng Waveform
Addition of L-UL-version
DC Characteristics
I
SB1
typ: 1/1
μ
A to 1/1/1
μ
A
I
max: 40/20
μ
A to 40/20/5
μ
A
Addition of note4
Low V
Data Retention Characteristics
I
CCDR
typ: 0.8/0.8
μ
A to 0.8/0.8/0.8
μ
A
I
max: 20/10
μ
A to 20/10/2
μ
A
Addition of note3
S. Kunito
K. Imato
2.0
Jan. 29, 1999
S. Kunito
K. Imato
3.0
Apr. 8, 1999
S. Kunito
K. Imato
4.0
Aug. 24, 1999
Low V
Data Retention Characteristics
Correct error: t
R
unit ms to ns
Low V
Data Retention Characteristics
Change of Low V
CC
Data Retention Timmng Waveform
AC Characteristics
Test Conditions: Output timing reference level
0.8 V/2.0 V to 1.5 V/1.5 V (HM62V8512B-7)
0.8 V/2.0 V (HM62V8512B-8)
S. Kunito
K. Imato
5.0
Oct. 20, 1999
I. Ogiwara
K. Imato
6.0
Mar. 31, 2000
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PDF描述 |
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| HM62V8512BLRR-7SL | 4 M SRAM (512-kword x 8-bit) |
| HM62V8512BLRR-7UL | 4 M SRAM (512-kword x 8-bit) |
| HM62V8512BLRR-8 | 4 M SRAM (512-kword x 8-bit) |
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