參數(shù)資料
型號(hào): HM62V8512CLRR-7
廠商: Hitachi,Ltd.
元件分類: SRAM
英文描述: 4 M SRAM (512-kword x 8-bit)
中文描述: 四米的SRAM(512 - KWord的× 8位)
文件頁(yè)數(shù): 1/16頁(yè)
文件大?。?/td> 75K
代理商: HM62V8512CLRR-7
HM62V8512C Series
4 M SRAM (512-kword
×
8-bit)
ADE-203-1210A (Z)
Rev. 1.0
Jan. 31, 2001
Description
The Hitachi HM62V8512C is a 4-Mbit static RAM organized 512-kword
×
8-bit. It realizes higher density,
higher performance and low power consumption by employing CMOS process technology (6-transistor
memory cell). The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II is
available for high density mounting. The HM62V8512C is suitable for battery backup system.
Features
Single 3.0 V supply: 2.7 V to 3.6 V
Access time: 55/70 ns (max)
Power dissipation
Active: 6.0 mW/MHz (typ)
Standby: 2.4 μW (typ)
Completely static memory. No clock or timing strobe required
Equal access and cycle times
Common data input and output: Three state output
Directly LV-TTL compatible: All inputs
Battery backup operation
相關(guān)PDF資料
PDF描述
HM62V8512CLRR-7SL 4 M SRAM (512-kword x 8-bit)
HM62V8512CLTT-5SL 4 M SRAM (512-kword x 8-bit)
HM62V8512CLTT-7 Octal Buffer/Driver With 3-State Outputs 20-PDIP -40 to 85
HM62V8512CLTT-7SL 4 M SRAM (512-kword x 8-bit)
HM62V8512CLFP-5 4 M SRAM (512-kword x 8-bit)
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