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參數(shù)資料
| 型號： | HM62V8512CLTT-5SL |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | SRAM |
| 英文描述： | 4 M SRAM (512-kword x 8-bit) |
| 中文描述： | 四米的SRAM（512 - KWord的× 8位） |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 75K |
| 代理商： | HM62V8512CLTT-5SL |
HM62V8512C Series
7
AC Characteristics
(Ta = –20 to +70°C, V
CC
= 2.7 V to 3.6 V, unless otherwise noted.)
Test Conditions
Input pulse levels: 0.4 V to 2.4 V
Input rise and fall time: 5 ns
Input timing reference levels: 1.4 V
Output timing reference level: 1.4 V/1.4 V(HM62V8512C-5)
0.8 V/2.0 V(HM62V8512C-7)
Output load: See figure (Including scope & jig)
Dout
500
1.4 V
50 pF
Read Cycle
HM62V8512C
-5
-7
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Read cycle time
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
55
—
70
—
ns
Address access time
—
55
—
70
ns
Chip select access time
—
55
—
70
ns
Output enable to output valid
—
30
—
35
ns
Chip selection to output in low-Z
10
—
10
—
ns
2
Output enable to output in low-Z
5
—
5
—
ns
2
Chip deselection to output in high-Z
0
20
0
30
ns
1, 2
Output disable to output in high-Z
0
20
0
30
ns
1, 2
Output hold from address change
10
—
10
—
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM62V8512CLTT-7 | Octal Buffer/Driver With 3-State Outputs 20-PDIP -40 to 85 |
| HM62V8512CLTT-7SL | 4 M SRAM (512-kword x 8-bit) |
| HM62V8512CLFP-5 | 4 M SRAM (512-kword x 8-bit) |
| HM62V8512CLFP-5SL | 4 M SRAM (512-kword x 8-bit) |
| HM62V8512CLFP-7 | 4 M SRAM (512-kword x 8-bit) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM62W16255HCJP12 | 制造商:Renesas Electronics Corporation 功能描述: |
| HM62W4100HJP15 | 制造商:Renesas Electronics Corporation 功能描述: |
| HM62W8512BLFP-5 | 制造商:HITACHI 功能描述: |
| HM62W8512BLTTI7 | 制造商:Hitachi 功能描述: |
| HM-630 | 制造商:Black Box Corporation 功能描述:FACE PLATE:HM-STAINLESS |
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