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參數(shù)資料
| 型號： | HMP8173CN |
| 廠商： | INTERSIL CORP |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | NTSC/PAL Video Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 封裝： | 14 X 14 MM, METRIC, PLASTIC, MO-108BD-2, QFP-64 |
| 文件頁數(shù)： | 19/33頁 |
| 文件大?。?/td> | 232K |
| 代理商： | HMP8173CN |
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TABLE 26. CLOSED CAPTION_284A DATA REGISTER
SUB ADDRESS = 12
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
LSB Data
This register is cascaded with the closed caption_284B data register and they are read out
serially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the
284A data register is shifted out first.
80
H
TABLE 27. CLOSED CAPTION_284B DATA REGISTER
SUB ADDRESS = 13
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
MSB Data
This register is cascaded with the closed caption_284A data register and they are read out
serially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the
284A data register is shifted out first.
80
H
TABLE 28. WSS_20A DATA REGISTER
SUB ADDRESS = 14
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 20
WSS LSB Data
This register is cascaded with the WSS_20B data register and they are read out serially as 14
bits during line 17, 20, or 23 if WSS is enabled. Bit D0 of the WSS_20A data register is shifted
out first.
00
H
TABLE 29. WSS_20B DATA REGISTER
SUB ADDRESS = 15
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 6
Reserved
00
B
5 - 0
Line 20
WSS MSB Data
This register is cascaded with the WSS_20A data register and they are read out serially as 14
bits during line 17, 20, or 23 if WSS is enabled. Bit D0 of the WSS_20A data register is shifted
out first.
000000
B
TABLE 30. WSS_283A DATA REGISTER
SUB ADDRESS = 16
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 283
WSS LSB Data
This register is cascaded with the WSS_283B data register and they are read out serially as
14 bits during line 280, 283, or 336 if WSS is enabled. Bit D0 of the WSS_283A data register
is shifted out first.
00
H
TABLE 31. WSS_283B DATA REGISTER
SUB ADDRESS = 17
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 6
Reserved
00
B
5 - 0
Line 283
WSS MSB Data
This register is cascaded with the WSS_283A data register and they are read out serially as
14 bits during line 280, 283, or 336 if WSS is enabled. Bit D0 of the WSS_283A data register
is shifted out first.
000000
B
TABLE 32. CRC_20 REGISTER
SUB ADDRESS = 18
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-6
Reserved
00
B
5-0
Line 20
WSS CRC Data
This register is read out serially after the 14 bits of NTSC WSS data, if WSS is enabled. It is
ignored during PAL WSS operation. Bit D0 is shifted out first.
111111
B
HMP8170, HMP8171, HMP8172, HMP8173
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PDF描述 |
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| HMP9701 | AC’97 Audio Codec |
| HMP9701ACN | AC’97 Audio Codec |
| HMP9701CN | AC’97 Audio Codec |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMP817XEVAL1 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8190 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8190CN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8190EVAL1 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8191 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
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