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參數(shù)資料
| 型號： | HN58S256AT-20 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 256 k EEPROM (32-kword x 8-bit) |
| 中文描述： | 256畝的EEPROM（32 KWord的× 8位） |
| 文件頁數(shù)： | 14/17頁 |
| 文件大?。?/td> | 88K |
| 代理商： | HN58S256AT-20 |
HN58S256A Series
2. Data Protection at V
CC
On/Off
When V
CC
is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act
as a trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional
programming, the EEPROM must be kept in an unprogrammable state while the CPU is in an unstable
state.
Note:
The EEPROM shoud be kept in unprogrammable state during V
CC
on/off by using CPU RESET
signal.
V
CC
CPU
RESET
Unprogrammable
Unprogrammable
*
*
(1) Protection by
CE
,
OE
,
WE
To realize the unprogrammable state, the input level of control pins must be held as shown in the table
below.
CE
OE
WE
×
: Don’t care.
V
CC
: Pull-up to V
CC
level.
V
SS
: Pull-down to V
SS
level.
V
CC
×
×
×
×
×
V
SS
×
V
CC
相關PDF資料 |
PDF描述 |
|---|---|
| HN58S256AT-15 | 256 k EEPROM (32-kword x 8-bit) |
| HN58S65AI | 8192-word ×8-bit Electrically Erasable and Programmable CMOS ROM(8k字×8位 EEPROM) |
| HN58S65AT-15 | 64 k EEPROM (8-kword x 8-bit) Ready/Busy function |
| HN58S65A | 64 k EEPROM (8-kword ×8-bit)(64 k EEPROM (8k字 ×8位)) |
| HN58V1001P-25 | 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HN58S256ATI-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58S256ATI-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58S65A | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:64 k EEPROM (8-kword x 8-bit) Ready/Busy function |
| HN58S65AISERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58S65ASERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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