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參數(shù)資料
| 型號： | HN58X25256I |
| 英文描述： | Datasheet|ADE-203-1371|NOV.15.02|170K |
| 中文描述： | 技術資料|腺- 203 - 1371 | NOV.15.02 | 170,000 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 59K |
| 代理商： | HN58X25256I |
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
10
Acknowledge
All addresses and data words are serially transmitted to and from in 8-bit words. The receiver sends a zero
to acknowledge that it has received each word. This happens during ninth clock cycle. The transmitter
keeps bus open to receive acknowledgment from the receiver at the ninth clock. In the write operation,
EEPROM sends a zero to acknowledge after receiving every 8-bit words. In the read operation, EEPROM
sends a zero to acknowledge after receiving the device address word. After sending read data, the
EEPROM waits acknowledgment by keeping bus open. If the EEPROM receives zero as an acknowledge,
it sends read data of next address. If the EEPROM receives acknowledgment "1" (no acknowledgment)
and a following stop condition, it stops the read operation and enters a stand-by mode. If the EEPROM
receives neither acknowledgment "0" nor a stop condition, the EEPROM keeps bus open without sending
read data.
Acknowledge Timing Waveform
SCL
SDA IN
SDA OUT
1
2
8
9
Acknowledge
out
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| HN58X2532FPI | HN58X2532I/HN58X2564I Datasheet |
| HN58X2532NI | HN58X2532I/HN58X2564I Datasheet |
| HN58X2532TI | HN58X2532I/HN58X2564I Datasheet |
| HN58X2564FPI | HN58X2532I/HN58X2564I Datasheet |
| HN58X2564NI | HN58X2532I/HN58X2564I Datasheet |
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