參數(shù)資料
型號(hào)： HPC-DEV-WDBC
廠商： National Semiconductor Corporation
英文描述： High-Performance microController with A/D
中文描述： 高性能微控制器/數(shù)
文件頁(yè)數(shù)： 28/39頁(yè)
文件大?。?/td> 430K
代理商： HPC-DEV-WDBC
Shared Memory Support
Shared memory access provides a rapid technique to ex-
change data. It is effective when data is moved from a pe-
ripheral to memory or when data is moved between blocks
of memory. A related area where shared memory access
proves effective is in multiprocessing applications where
two CPUs share a common memory block. The HPC46164
supports shared memory access with two pins. The pins are
the RDY/HLD input pin and the HLDA output pin. The user
can software select either the Hold or Ready function by the
state of a control bit. The HLDA output is multiplexed onto
port B.
The host uses DMA to interface with the HPC46164. The
host initiates a data transfer by activating the HLD input of
the HPC46164. In response, the HPC46164 places its sys-
tem bus in a TRI-STATE Mode, freeing it for use by the host.
The host waits for the acknowledge signal (HLDA) from the
HPC46164 indicating that the sytem bus is free. On receiv-
ing the acknowledge, the host can rapidly transfer data into,
or out of, the shared memory by using a conventional DMA
controller. Upon completion of the message transfer, the
host removes the HOLD request and the HPC46164 re-
sumes normal operations.
To insure proper operation, the interface logic shown is rec-
ommended as the means for enabling and disabling the us-
er’s bus. Figure 29 illustrates an application of the shared
memory interface between the HPC46164 and a Series
32000 system.
TL/DD/9682–31
FIGURE 29. Shared Memory Application: HPC46164 Interface to Series 32000 System
28
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