參數(shù)資料
型號: HPC26083
廠商: National Semiconductor Corporation
英文描述: High-Performance microControllers
中文描述: 高性能微控制器
文件頁數(shù): 3/36頁
文件大?。?/td> 467K
代理商: HPC26083
AC Electrical Specifications Test Conditions VCC e 45V and 55V (Unless Otherwise Specified) (Note 1)
(Continued)
Symbol
Parameter
Conditions
SBGRP 9
SBGRP 10
SBGRP 11
Units
Notes
a
25 C
a
125 C
b
55 C
Min
Max
Min
Max
Min
Max
tRWP e tC
RDY Pulse Width
100
ns
(Note 6)
tSALE e
tC a 40 Falling Edge of HLD to
115
ns
(Note 6)
to Rising Edge of ALE
tHWP e tC a 10
HLD Pulse Width
110
ns
(Note 6)
tHAD e
tC a85
Rising Edge on HLD to
160
ns
(Note 6)
Rising Edge on HLDA
tHAE e tC a100
Falling Edge on HLD to
200
ns
(Note 6)
Falling Edge on HLDA
tBF e
tC a66
BUS Float before
116
ns
(Note 6)
Falling Edge on HLDA
tBE e
tC a66
BUS Enable from
116
ns
(Note 6)
Rising Edge of HLDA
tUAS
Address Setup Time to
10
ns
(Note 6)
Falling Edge of URD
tUAH
Address Hold Time from
10
ns
(Note 6)
Rising Edge of URD
tRPW
URD Pulse Width
100
ns
(Note 6)
tOE
URD Falling Edge to
60
ns
(Note 6)
Data Out Valid
tRDRDY
RDY Delay from
70
ns
(Note 6)
Rising Edge of URD
tWDW
UWR Pulse Width
40
ns
(Note 6)
tUDS
Data Invalid before
10
ns
(Note 6)
Trailing Edge of UWR
tUDH
Data In Hold after
15
ns
(Note 6)
Rising Edge of UWR
tA
WRRDY Delay from
70
ns
(Note 6)
Rising Edge of UWR
Note 1
Electrical end point testing (when required) for groupsCD shall consist only of subgroups 1 2 9 and 10
Note 5
Tested in functional patterns Not directly measured
Note 6
CL e 70 pF Input and output levels are per DC characteristics
Pin Descriptions
The HPC16083 is available in 68-pin PLCC LDCC PGA
and 80-pin PQFP packages
IO PORTS
Port A is a 16-bit bidirectional IO port with a data direction
register to enable each separate pin to be individually de-
fined as an input or output When accessing external memo-
ry port A is used as the multiplexed addressdata bus
Port B is a 16-bit port with 12 bits of bidirectional IO similar
in structure to Port A Pins B10 B11 B12 and B15 are gen-
eral purpose outputs only in this mode Port B may also be
configured via a 16-bit function register BFUN to individually
allow each pin to have an alternate function
B0
TDX
UART Data Output
B1
B2
CKX
UART Clock (Input or Output)
B3
T2IO
Timer2 IO Pin
B4
T3IO
Timer3 IO Pin
B5
SO
MICROWIREPLUS Output
B6
SK
MICROWIREPLUS Clock (Input or Output)
B7
HLDA
Hold Acknowledge Output
B8
TS0
Timer Synchronous Output
B9
TS1
Timer Synchronous Output
B10
UA0
Address 0 Input for UPI Mode
B11
WRRDY Write Ready Output for UPI Mode
B12
B13
TS2
Timer Synchronous Output
11
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