參數(shù)資料
型號(hào): HS1-82C37ARH
廠商: Intersil Corporation
英文描述: Radiation Hardened CMOS High Performance Programmable DMA Controller
中文描述: 輻射加固的CMOS高性能可編程DMA控制器
文件頁數(shù): 12/28頁
文件大?。?/td> 253K
代理商: HS1-82C37ARH
12
HS-82C37ARH
Spec Number
518058
Waveforms
FIGURE 1. SLAVE MODE TIMING
NOTE: Host system must allow at least TCLCL as recovery time between successive write accesses
FIGURE 2. SLAVE MODE READ
NOTE: Host system must allow at least TCLCL as recovery time between successive write accesses
FIGURE 3. READY
* READ refers to both IOR and MEMR outputs. WRITE refers to both IOW and MEMW outputs
CS
IOW
TAVIWL
A0-A3
DB0-DB7
TIWLIWH
INPUT VALID
TDVIWH
INPUT VALID
TIWHAX
TIWHAX
TIWHDX
CS
A0-A3
IOR
DB0-DB7
TAVIRL
ADDRESS MUST BE VALID
TIRLIRH
TIRLDV
TIRHAX
TIRHDZ
DATA OUT VALID
CLK
READY
S2
S3
SW
SW
S4
TCHRWL
TCHRWL
EXTENDED
WRITE
TCHRWL
TCLRYX
TRYVCL
TCHRH
TCHWH
TCLRYX
TRYVCL
WRITE
*
READ
*
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