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參數(shù)資料
| 型號(hào)： | HS4318ESH01H |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-series microcomputer |
| 中文描述： | 4位HMCS400系列微機(jī) |
| 文件頁(yè)數(shù)： | 11/66頁(yè) |
| 文件大?。?/td> | 305K |
| 代理商： | HS4318ESH01H |
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HD404318 Series
11
IE
IM
IAOF
IF
ICSF
ICEF
RAME
RSP
WDON
ADSF
Not used
SEM/SEMD
Allowed
Not executed
Allowed
Allowed
Not executed
Not executed
Allowed
Allowed
REM/REMD
Allowed
Allowed
Not executed
Inhibited
Not executed
TM/TMD
Allowed
Inhibited
Inhibited
Allowed
Inhibited
Note:
WDON is reset by MCU reset or by
STOPC
enable for stop mode cancellation. The REM or REMD
instruction must not be executed for ADSF during A/D conversion. If the TM or TMD instruction is
executed for the inhibited bits or non-existing bits, the value in ST becomes invalid.
Figure 4 Usage Limitations of RAM Bit Manipulation Instructions
Memory registers
$040
$041
$042
$043
$044
$045
$046
$047
$048
$049
$04A
$04B
$04C
$04D
$04E
$04F
MR(15)
$3C0
$3FF
MR(0)
MR(1)
MR(2)
MR(3)
MR(4)
MR(5)
MR(6)
MR(7)
MR(8)
MR(9)
MR(10)
MR(11)
MR(12)
MR(13)
MR(14)
Level 16
Level 15
Level 14
Level 13
Level 12
Level 11
Level 10
Level 9
Level 8
Level 7
Level 6
Level 5
Level 4
Level 3
Level 2
Level 1
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
ST
PC
CA
PC
10
3
13
9
6
2
12
8
5
1
11
7
4
0
Bit 3
Bit 2
Bit 1
Bit 0
PC –PC :
ST: Status flag
CA: Carry flag
Program counter
Stack area
$3FC
$3FD
$3FE
$3FF
Figure 5 Configuration of Memory Registers and Stack Area, and Stack Position
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HS4318ESS01H | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-bit HMCS400-series microcomputer |
| HS4-3282-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| HS4-3282R3404 | 制造商:Harris Corporation 功能描述: |
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