- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371896 > HSP43220GC-33 (INTERSIL CORP) Decimating Digital Filter PDF資料下載
參數(shù)資料
| 型號： | HSP43220GC-33 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | Decimating Digital Filter |
| 中文描述： | 16-BIT, DSP-DIGITAL FILTER, CPGA84 |
| 封裝： | CERAMIC, PGA-84 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 190K |
| 代理商： | HSP43220GC-33 |
3-206
Chip Set Application
The HSP43220 is ideally suited for narrow band filtering in
Communications, Instrumentation and Signal Processing
applications. The HSP43220 provides a fully integrated
solution to high order decimation filtering.
The combination of the HSP43220 and the HSP45116
(which is a NCOM Numerically Controlled Oscillator /
Modulator) provides a complete solution to digital receivers.
The diagram in Figure 14 illustrates this concept.
The HSP45116 down converts the signal of interest to
baseband, generating a real component and an imaginary
component. A HSP43220 then performs low pass filtering
and reduces the sampling rate of each of the signals.
The system scenario for the use of the DDF involves a
narrow band signal that has been over-sampled. The signal
is over-sampled in order to capture a wide frequency band
containing many narrow band signals. The NCOM is “tuned”
to the frequency of the signal of interest and performs a
complex down conversion to baseband of this signal, which
results in a complex signal centered at baseband. A pair of
DDFs then low pass filters the NCOM output, extracting the
signal of interest.
Design Trade-Off Considerations
Equation 2 in the Functional Description section expresses
the relationship between the number of TAPS which can be
implemented in the FIR as a function of CK_IN, FIR_CK,
H
DEC
, F
DEC
. Table 1 provides a tradeoff of these
parameters. For a given speed grade and the ratio of the
clocks, and assuming minimum decimation in the HDF, the
number of FIR taps that can be implemented is given in
Equation 2.
FIGURE 12. ASYNCHRONOUS START UP
FIGURE 13. SYNCHRONOUS START UP
DDF
ASTARTIN
STARTIN
STARTOUT
DDF
ASTARTIN
STARTOUT
CK_IN
FIR_CK
+5V
NC
STARTIN
+5V
TO OTHER DDF'S
CK_IN
FIR_CK
DDF
ASTARTIN
STARTIN
STARTOUT
DDF
ASTARTIN
STARTOUT
+5V
+5V
STARTIN
NC
CK_IN
FIR_CK
CK_IN
FIR_CK
FIGURE 14. DIGITAL CHANNELIZER
COS (WT)
SIN (WT)
HSP43220
DDF
HSP43220
DDF
SAMPLED
INPUT
DATA
0
10MHz
0
20MHz
0
HSP45116
NCOM
HSP43220
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HSP43220VC-33 | Decimating Digital Filter |
| HSP43220 | RESISTOR 47 OHM 20W TO220 |
| HSP43220883 | Decimating Digital Filter |
| HSP43220JC-25 | CONN MEMORY CARD NORMAL TOP PCB |
| HSP43220JC-33 | CONNECTOR: SECURE DIGITAL MEMORY CARD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP43220GM-15/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP43220GM-25/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Decimating Digital Filter |
| HSP43220JC-15 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP43220JC-25 | 功能描述:有源濾波器 DECIMATING DIGITAL FILTER 84 PLCC, 25.6MHZ, COMM RoHS:否 制造商:Maxim Integrated 通道數(shù)量:1 截止頻率:150 KHz 電源電壓-最大:11 V 電源電壓-最小:4.74 V 最大工作溫度:+ 85 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP N 封裝:Tube |
| HSP43220JC-25Z | 功能描述:有源濾波器 W/ANNEAL DECIMATING DIGTL FILTER 6MHZ RoHS:否 制造商:Maxim Integrated 通道數(shù)量:1 截止頻率:150 KHz 電源電壓-最大:11 V 電源電壓-最小:4.74 V 最大工作溫度:+ 85 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP N 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。