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| 型號： | HV7131GP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號處理 |
| 文件頁數(shù)： | 56/61頁 |
| 文件大?。?/td> | 2621K |
| 代理商： | HV7131GP |
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HV7131GP
2004/10/29 V2.4 56
DC Characteristic
Symbol
Parameter
Units
Min.
Typical.
Max. Conditions&Note
V
dd
Internal operation supply voltage
Volt
2.6
-
3.0
-
I
dd
Operating current consumption
mA
-
40
At 15fps
(12.5Mhz)
HsI
dd
Hard Sleep Static current consumption
uA
-
48
At 15fps
(12.5Mhz)
SsI
dd
Soft Sleep Static current consumption
uA
-
-
276
At 15fps(12.5Mhz)
V
ih
Input voltage logic "1"
Volt
2.0
-
3.0
-
V
il
Input voltage logic "0"
Volt
0
-
0.8
-
V
oh
Output voltage logic "1"
Volt
2
-
-
at Ioh = -4mA
V
ol
Output voltage logic "0"
Volt
-
-
0.4
at Iol = 4mA
Iih
Input High Current
uA
-10
-
10
-
Iil
Input Low Current
uA
-10
-
10
-
T
a
Ambient operating temperature
Celsiu
s
-10
-
50
-
Cin
Input capacitance
pF
5
-
-
-
Cout
Output capacitance
pF
-
-
30
-
Cbid
Bi-directional buffer capacitance
pF
-
-
30
-
R
Epud
Note.1) R
E
pud is just applied to SDA and SCK pin. And If R
E
pud is less than 20K Ohm, power
External pull-up / pull-down resistance
Ohm
-
-
20k
1)
consumption is increased.
AC Operating Conditions
Symbol
Parameter
Max Operation Frequency
Units
Notes
MCLK
Main clock frequency
25
MHz
1,2
SCK
I
2
C clock frequency
400
KHz
3
1. MCLK may be divided by internal clock division logic for easy integration with high speed video
codec system.
2. Frame Rate : 30 frames/sec at 25Mhz, HBLANK = 208, VBLANK = 8
3. SCK is driven by host processor. For the detail serial bus timing, refer to I2C chip interface section
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