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參數(shù)資料
| 型號(hào)： | HV9408X |
| 廠商： | SUPERTEX INC |
| 元件分類： | 顯示驅(qū)動(dòng)器 |
| 英文描述： | 32-Channel Serial To Parallel Converter With High Voltage Push-Pull Outputs |
| 中文描述： | EL DISPLAY DRIVER, UUC41 |
| 封裝： | DIE |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大小： | 455K |
| 代理商： | HV9408X |
2
HV9308/HV9408
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
Logic Voltage Supply
4.5
5.5
V
High Voltage Supply
8.0
80
V
Input HIGH Voltage
V
DD
-0.5
V
DD
0.5
V
Input LOW Voltage
0
V
Clock Frequency
0
8.0
MHz
Operating Free-Air Temperature
Plastic
-40
+85
°
C
°
C
Ceramic
-55
+125
Notes:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
PP
.
Power-down sequence should be the reverse of the above.
The V
PP
should not drop below V
DD
during operations.
Electrical Characteristics
(V
PP
= 60V, V
DD
= 5V, T
A
=25
°
C)
DC Characteristics
Symbol
Parameter
Min
Max
Units
Conditions
I
PP
I
DDQ
I
DD
V
PP
Supply Current
I
DD
Supply Current (Quiescent)
I
DD
Supply Current (Operating)
100
μ
A
HV
OUT
outputs HIGH to LOW
All inputs = V
DD
or GND
V
DD
= V
DD
max,
f
CLK
= 8 MHz
I
O
= -100
μ
A
I
O
= 100
μ
A
Input = V
DD
Input = GND
100
μ
A
15
mA
V
OH
(Data)
V
OL
(Data)
I
IH
I
IL
V
OC
V
OH
V
OL
Shift Register Output Voltage
V
DD
-0.5
V
Shift Register Output Voltage
0.5
V
Current Leakage, any input
1.0
μ
A
Current Leakage, any input
-1.0
μ
A
HV
OUT
Output Clamp Diode Voltage
HV
OUT
Output when Sourcing
HV
OUT
Output when Sinking
-1.5
V
I
OC
= -5mA
I
OH
= -20mA, 0 to 70
°
C
I
OL
= 5mA, 0 to 70
°
C
52
V
4.0
V
AC Characteristics
Symbol
Parameter
Min
Max
Units
Conditions
f
CLK
t
WL
or t
WH
t
SU
t
H
t
DLH
(Data)
t
DHL
(Data)
t
DLE
t
WLE
t
SLE
t
ON
t
OFF
Clock Frequency
8.0
MHz
Clock width, HIGH or LOW
62
ns
Setup time before CLK rises
25
ns
Hold time after CLK rises
10
ns
Data Output Delay after L to H CLK
110
ns
C
L
= 15pF
C
L
= 15pF
Data Output Delay after H to L CLK
110
ns
LE Delay after L to H CLK
50
ns
Width of LE Pulse
50
ns
LE Setup Time before L to H CLK
50
ns
Delay from LE to HV
OUT
, L to H
Delay from LE to HV
OUT
, H to L
500
ns
500
ns
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