參數(shù)資料
型號: HWD491CSD
廠商: Electronic Theatre Controls, Inc.
元件分類: RS-485
英文描述: Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers
中文描述: 低功耗,限擺率限制RS-485/RS-422收發(fā)器
文件頁數(shù): 7/20頁
文件大?。?/td> 502K
代理商: HWD491CSD
Low-Power, S lew-Rate-Limited
RS -485/RS -422 Transc eivers
______________________________________________________________Pin Desc ription
HWD481
HWD483
HWD485
HWD487
HWD1487
TOP VIEW
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TOPINS A AND B WHEN DE IS HIGH.
TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SOPACKAGE.
1
2
3
4
8
7
5
V
CC
B
GND
DI
DE
RE
RO
R
D
Rt
Rt
6
D
R
DE
RE
DI
RO
A
B
1
2
3
4
8
7
6
5
V
CC
B
A
GND
DI
DE
RE
RO
DIP/SO
R
D
1
2
3
4
8
7
6
5
V
CC
A
GND
DE
RE
B
RO
μ
MAX
A
DI
HWD481
HWD483
HWD485
HWD487
HWD1487
Figure 1. HWD481/HWD483/HWD485/HWD487/HWD1487 Pin Configuration and Typical Operating Circuit
μMAX
5
6
7
8
2
1
3
μMAX
4
5
6
7
8
1
2
DIP/SO
DIP/SO
2
3
Receiver Output Enable. RO is enabled when
RE
is low; RO is
high impedance when
RE
is high.
3
4
Driver Output Enable. The driver outputs, Y and Z, are enabled
by bringing DE high. They are high impedance when DE is low. If
the driver outputs are enabled, the parts function as line drivers.
While they are high impedance, they function as line receivers if
RE
is low.
DIP/SO
4
5
Driver Input. A low on DI forces output Y low and output Z high.
Similarly, a high on DI forces output Y high and output Z low.
5
6, 7
Ground
9
Noninverting Driver Output
10
Inverting Driver Output
3
4
6
Noninverting Receiver Input and Noninverting Driver Output
12
Noninverting Receiver Input
5
6
8
RE
DE
DI
GND
Y
Z
A
A
7
B
Inverting Receiver Input and Inverting Driver Output
7
11
B
Inverting Receiver Input
8
1
14
V
CC
Positive Supply: 4.75V
V
CC
5.25V
1, 8, 13
N.C.
No Connect—not internally connected
FUNCTION
FUNCTION
NAME
NAME
4
3
1
2
Receiver Output: If A > B by 200mV, RO will be high;
If A < B by 200mV, RO will be low.
2
RO
PIN
HWD
481/
HWD
483/
HWD
485/
HWD
487/
HWD
1487
HWD
488/
HWD
490
HWD
489/
HWD
491
7
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