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| 型號(hào)： | HY57V641620HGT-PI |
| 廠(chǎng)商： | HYNIX SEMICONDUCTOR INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 4M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54 |
| 封裝： | 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大小： | 145K |
| 代理商： | HY57V641620HGT-PI |
HY57V641620HG
Rev. 1.0/Jan. 02
7
AC CHARACTERISTICS I
(AC operating conditions unless otherwise noted)
Note :
1.Assume tR / tF (input rise and fall time ) is 1ns
2.Access times to be measured with input signals of 1v/ns edge rate
Parameter
Symbol
-5I
-55I
-6I
-7I
-KI
-HI
-8I
-PI
-SI
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
System clock
cycle time
CAS Latency =
3
tCK3
5
1000
5.5
1000
6
100
0
7
1000
7.5
1000
7.5
1000
8
1000
10
1000
10
1000
ns
CAS Latency =
2
tCK2
10
10
10
10
7.5
10
10
10
12
ns
Clock high pulse width
tCHW
1.75
-
2
-
2
-
2.5
-
2.5
-
2.5
-
3
-
3
-
3
-
ns
1
Clock low pulse width
tCLW
1.75
-
2
-
2
-
2.5
-
2.5
-
2.5
-
3
-
3
-
3
-
ns
1
Access time
from clock
CAS Latency =
3
tAC3
-
4.5
-
5
-
5.4
-
5.4
-
5.4
5.4
-
6
6
-
6
ns
2
CAS Latency =
2
tAC2
-
6
-
6
-
6
-
6
-
5.4
6
-
6
-
6
-
8
ns
Data-out hold time
tOH
2.0
-
2.0
-
2.0
-
2.0
-
2.0
-
2.0
-
2.0
-
2.0
-
2.0
-
ns
Data-Input setup time
tDS
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
2
-
2
-
2
-
ns
1
Data-Input hold time
tDH
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
1
-
1
-
1
-
ns
1
Address setup time
tAS
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
2
-
2
-
2
-
ns
1
Address hold time
tAH
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
1
-
1
-
1
-
ns
1
CKE setup time
tCKS
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
2
-
2
-
2
-
ns
1
CKE hold time
tCKH
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
1
-
1
-
1
-
ns
1
Command setup time
tCS
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
1.5
-
2
-
2
-
2
-
ns
1
Command hold time
tCH
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
0.8
-
1
-
1
-
1
-
ns
1
CLK to data output in low Z-time tOLZ
1
-
1
-
1
-
1.5
-
1.5
-
1.5
-
1
-
1
-
2
-
ns
CLK to data
output in high
Z-time
CAS Latency =
3
tOHZ3
5.4
5.4
5.4
5.4
5.4
5.4
3
6
6
6
ns
CAS Latency =
2
tOHZ2
3
6
ns
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|---|---|
| HY57V641620HG | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGT-5 | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGT-55 | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGT-55I | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGT-5I | 4 Banks x 1M x 16Bit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V641620HGT-S | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGT-SI | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620TC-10 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:x16 SDRAM |
| HY57V641620TC-12 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:x16 SDRAM |
| HY57V641620TC-15 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:x16 SDRAM |
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