- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385426 > HY5DU281622ET-36 (HYNIX SEMICONDUCTOR INC) 128M(8Mx16) GDDR SDRAM PDF資料下載
參數(shù)資料
| 型號： | HY5DU281622ET-36 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 128M(8Mx16) GDDR SDRAM |
| 中文描述： | 8M X 16 DDR DRAM, 0.6 ns, PDSO66 |
| 封裝： | 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66 |
| 文件頁數(shù)： | 22/34頁 |
| 文件大?。?/td> | 379K |
| 代理商： | HY5DU281622ET-36 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
Rev. 0.5 / Jan. 2005
22
HY5DU281622ET
DC CHARACTERISTICS II
(TA=0 to 70
o
C, Voltage referenced to V
SS
= 0V)
Note :
1. I
DD1, IDD4
and I
DD5
depend on output loading and cycle rates. Specified values are measured with the output open.
2. Min. of t
RFC
(Auto Refresh Row Cycle Time) is shown at AC CHARACTERISTICS.
Parameter
Symbol
Test Condition
Speed
Unit
Note
25
26
28
30
33
Operating Current
I
DD0
One bank; Active - Precharge;
tRC=tRC(min); tCK=tCK(min);
DQ,DM and DQS inputs changing
twice per clock cycle; address and
control inputs changing once per
clock cycle
230
220
210
200
190
mA
1
Operating Current
I
DD1
Burst ength=4, One bank active
t
RC
≥
t
RC
(min), I
OL
=0mA
230
220
210
200
190
mA
1
Precharge Standby
Current in Power Down
Mode
I
DD2P
CKE
≤
V
IL
(max), t
CK
=min
40
40
40
40
40
mA
Precharge Standby
Current in Non Power
Down Mode
I
DD2N
CKE
≥
V
IH
(min), /CS
≥
V
IH
(min),
t
CK
= min, Input signals are
changed one time during 2clks
150
140
130
120
110
mA
Active Standby Cur-
rent in Power Down
Mode
I
DD3P
CKE
≤
V
IL
(max), t
CK
=min
40
40
40
40
40
mA
Active Standby Cur-
rent in Non Power
Down Mode
I
DD3N
CKE
≥
V
IH
(min), /CS
≥
V
IH
(min),
t
CK
=min, Input signals are
changed one time during 2clks
190
180
170
160
150
mA
Burst Mode Operating
Current
I
DD4
t
CK
≥
t
CK
(min), I
OL
=0mA
All banks active
380
360
340
320
300
mA
1
Auto Refresh Current
I
DD5
t
RC
≥
t
RFC
(min),
All banks active
380
360
340
320
300
mA
1,2
Self Refresh Current
I
DD6
CKE
≤
0.2V
4
4
4
4
4
mA
Operating Current -
Four Bank Operation
I
DD7
Four bank interleaving with BL=4,
Refer to the following page for
detailed test condition
530
510
490
470
450
mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY5DU281622ET-4 | 128M(8Mx16) GDDR SDRAM |
| HY5DU281622ET-5 | 128M(8Mx16) GDDR SDRAM |
| HY5DU283222AF | 128M(4Mx32) GDDR SDRAM |
| HY5DU283222AF-2 | 128M(4Mx32) GDDR SDRAM |
| HY5DU283222AF-22 | 128M(4Mx32) GDDR SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY5DU281622ET-4 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128M(8Mx16) GDDR SDRAM |
| HY5DU281622ET-5 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128M(8Mx16) GDDR SDRAM |
| HY5DU281622ETP | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb DDR SDRAM |
| HY5DU281622ETP-25 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128M(8Mx16) gDDR SDRAM |
| HY5DU281622ETP-26 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128M(8Mx16) gDDR SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。