參數(shù)資料
型號(hào): HY5DV651622T-G7
英文描述: DDR Synchronous DRAM
中文描述: DDR同步DRAM
文件頁(yè)數(shù): 20/27頁(yè)
文件大?。?/td> 273K
代理商: HY5DV651622T-G7
Rev. 0.3/May. 02
20
HY5DV281622AT
EXTENDED MODE REGISTER SET (EMRS)
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional func-
tions include DLL enable/disable, output driver strength selection(optional). These functions are controlled via the bits
shown below. The Extended Mode Register is programmed via the Mode Register Set command ( BA0=1 and BA1=0)
and will retain the stored information until it is programmed again or the device loses power.
The Extended Mode Register must be loaded when all banks are idle and no bursts are in progress, and the controller
must wait the specified time before initiating any subsequent operation. Violating either of these requirements will
result in unspecified operation.
BA1
BA0
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
1
RFU*
DS
DLL
A0
DLL enable
0
Enable
1
Diable
BA0
MRS Type
0
MRS
1
EMRS
* All bits in RFU address fields must be programmed to Zero, all other states are reserved for future usage.
A1
Output Driver Impedance Control
0
Full Strength Driver
1
Half Strength Driver
相關(guān)PDF資料
PDF描述
HY5PS121623F 32Mx16|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS121623LF 32Mx16|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12423F 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12423LF 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12823F 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
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