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參數(shù)資料
| 型號(hào)： | HYB18T1G400AF-3S |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 1 Gbit DDR2 SDRAM |
| 中文描述： | 1千兆位DDR2內(nèi)存 |
| 文件頁(yè)數(shù)： | 40/89頁(yè) |
| 文件大?。?/td> | 1261K |
| 代理商： | HYB18T1G400AF-3S |
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Page 40 Rev. 1.02 May 2004
INFINEON Technologies
HYB18T1G400/800/160AF
1Gb DDR2 SDRAM
2.6.6 Burst Interruption
Interruption of a read or write burst is prohibited for burst length of 4 and only allowed for burst length of 8 under
the following conditions:
1. A Read Burst of 8 can only be interrupted by another Read command. Read burst interruption by a Write or Precharge
Command is prohibited.
2. A Write Burst of 8 can only be interrupted by another Write command. Write burst interruption by a Read or Precharge
Command is prohibited.
3. Read burst interrupt must occur exactly two clocks after the previous Read command. Any other Read burst interrupt timings
are prohibited.
4. Write burst interrupt must occur exactly two clocks after the previous Write command. Any other Read burst interrupt timings
are prohibited.
5. Read or Write burst interruption is allowed to any bank inside the DDR2 SDRAM.
6. Read or Write burst with Auto-Precharge enabled is not allowed to be interrupted.
7. Read burst interruption is allowed by a Read with Auto-Precharge command.
8. Write burst interruption is allowed by a Write with Auto-Precharge command.
9. All command timings are referenced to burst length set in the mode register. They are not referenced to the actual burst. For
example, Minimum Read to Precharge timing is AL + BL/2 where BL is the burst length set in the mode register and not the
actual burst (which is shorter because of interrupt). Minimum Write to Precharge timing is WL + BL/ 2 + tWR, where tWR
starts with the rising clock after the un-interrupted burst end and not form the end of the actual burst end.
Examples:
Read Burst Interrupt Timing Example: (CL = 3, AL = 0, RL = 3, BL = 8)
NOP
NOP
NOP
NOP
NOP
NOP
READ A
T0
T2
T1
T3
T4
T5
T6
T7
T8
CMD
DQ
RBI
DQS,
DQS
READ B
NOP
Dout A0
Dout A1
Dout A2
Dout A3 Dout B0
Dout B1
Dout B2
Dout B3
Dout B4
Dout B5
Dout B6
Dout B
CK, CK
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|---|---|
| HYB18T1G400AF-5 | 1 Gbit DDR2 SDRAM |
| HYB18T1G800AF | 1 Gbit DDR2 SDRAM |
| HYB18T1G400AFL-3 | 1 Gbit DDR2 SDRAM |
| HYB18T1G160AFL-3 | 1 Gbit DDR2 SDRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18T1G400AF-5 | 制造商:Infineon Technologies AG 功能描述:256M X 4 DDR DRAM, 0.6 ns, PBGA68 |
| HYB18T1G800BF-3S | 功能描述:IC DDR2 SDRAM 1GBIT 68TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁(yè)面:1449 (CN2011-ZH PDF) |
| HYB18T256400AF-3.7 | 制造商:Infineon Technologies AG 功能描述:64M X 4 DDR DRAM, 0.5 ns, PBGA60 |
| HYB18T256400AF-5 | 制造商:Infineon Technologies AG 功能描述:SDRAM, DDR, 64M x 4, 60 Pin, Plastic, BGA |
| HYB18T256800AF-5 | 制造商:Infineon Technologies AG 功能描述: |
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