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    • 參數(shù)資料
      型號(hào): HYB18T1G800AFL-3
      廠商: INFINEON TECHNOLOGIES AG
      英文描述: 1 Gbit DDR2 SDRAM
      中文描述: 1千兆位DDR2內(nèi)存
      文件頁(yè)數(shù): 76/89頁(yè)
      文件大?。?/td> 1752K
      代理商: HYB18T1G800AFL-3
      Page 76 Rev. 1.02 May 2004
      INFINEON Technologies
      HYB18T1G400/800/160AF
      1Gb DDR2 SDRAM
      tRP(A)
      Precharge-All (8 banks) command period
      tRP+1tCK
      -
      tRP+1tCK
      -
      ns
      22
      tRRD
      Active bank A to Active bank B com-
      mand period
      x4 & x8
      (1k page size)
      7.5
      -
      7.5
      -
      ns
      23
      x16 (2k page size)
      10
      -
      10
      -
      ns
      tFAW
      Four Activate Window period
      x4 & x8
      (1k page size)
      37.5
      -
      37.5
      -
      ns
      x16 (2k page size)
      50
      -
      50
      -
      ns
      tCCD
      CAS A to CAS B Command Period
      2
      2
      tCK
      tWR
      Write recovery time
      15
      -
      15
      -
      ns
      tDAL
      Auto-Precharge write recovery + precharge time
      WR+tRP
      -
      WR+tRP
      -
      tCK
      14
      tWTR
      Internal Write to Read command delay
      10
      -
      7.5
      -
      ns
      15
      tRTP
      Internal Read to Precharge command delay
      7.5
      -
      7.5
      -
      ns
      tXARD
      Exit power down to any valid command
      (other than NOP or Deselect)
      2
      -
      2
      -
      tCK
      16
      tXARDS
      Exit active power-down mode to Read command
      (slow exit, lower power)
      6 - AL
      -
      6 - AL
      -
      tCK
      16
      tXP
      Exit precharge power-down to any valid command
      (other than NOP or Deselect)
      2
      -
      2
      -
      tCK
      tXSRD
      Exit Self-Refresh to Read command
      200
      -
      200
      -
      tCK
      tXSNR
      Exit Self-Refresh to non-Read command
      tRFC+10
      -
      tRFC+10
      -
      ns
      tCKE
      CKE minimum high and low pulse width
      3
      -
      3
      -
      tCK
      tREFI
      Average periodic refresh Interval
      0
      o
      C - 85
      o
      C
      -
      7.8
      -
      7.8
      μs
      19
      85
      o
      C - 95
      o
      C
      -
      3.9
      -
      3.9
      μs
      tOIT
      OCD drive mode output delay
      0
      12
      0
      12
      ns
      tDELAY
      Minimum time clocks remain ON after CKE asynchro-
      nously drops LOW
      tIS+tCK+tIH
      -
      tIS+tCK+tIH
      -
      ns
      17
      Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be
      powered down and then restarted through the specified initialization sequence before normal operation can continue.
      7.1 Timing Parameter by Speed Grade- DDR2-400 & DDR2-533
      (VDDQ = 1.8V
      ±
      0.1V; VDD = 1.8V
      ±
      0.1V) (notes 1-4)
      Symbol
      Parameter
      -5
      DDR2-400-333
      -3.7
      DDR2-533-444
      Unit
      Notes
      min.
      max
      min.
      max
      相關(guān)PDF資料
      PDF描述
      HYB18T1G800AFL-37 1 Gbit DDR2 SDRAM
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      HYB18T1G800AFL-5 1 Gbit DDR2 SDRAM
      HYB18T1G800TC-3 MEMORY SPECTRUM
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