參數(shù)資料
型號: HYB39S128400CT-7
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128-MBit Synchronous DRAM
中文描述: 128兆位同步DRAM
文件頁數(shù): 17/51頁
文件大?。?/td> 470K
代理商: HYB39S128400CT-7
HYB 39S128400/800/160CT(L)
128-MBit Synchronous DRAM
INFINEON Technologies
17
9.01
AC Characteristics
1, 2
T
A
= 0 to 70
°
C;
V
SS
= 0 V;
V
DD
= 3.3 V
±
0.3 V,
t
T
= 1 ns
Parameter
Symb.
Limit Values
Unit
Note
-7
-7.5
-8
min.
max.
min.
max.
min.
max.
Clock and Clock Enable
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
t
CK
7
7.5
7.5
10
8
10
ns
ns
Clock frequency
CAS Latency = 3
CAS Latency = 2
t
CK
143
133
133
100
125
100
MHz
MHz
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
t
AC
5.4
5.4
5.4
6
6
6
ns
ns
2, 3, 6
Clock High Pulse Width
t
CH
t
CL
t
T
2.5
2.5
3
ns
Clock Low Pulse Width
2.5
2.5
3
ns
Transition Time
0.3
1.2
0.3
1.2
0.5
10
ns
Setup and Hold Times
Input Setup Time
t
IS
t
IH
t
CKS
t
CKH
t
RSC
t
SB
1.5
1.5
2
ns
4
Input Hold Time
0.8
0.8
1
ns
4
CKE Setup Time
1.5
1.5
2
ns
4
CKE Hold Time
0.8
0.8
1
ns
4
Mode Register Set-up Time
2
2
2
CLK
Power Down Mode Entry
Time
0
7
0
7.5
0
8
ns
Common Parameters
Row to Column Delay Time
t
RCD
t
RP
t
RAS
t
RC
t
RRD
15
20
20
ns
5
Row Precharge Time
15
20
20
ns
5
Row Active Time
42
100k
45
100k
48
100k
ns
5
Row Cycle Time
60
67
70
ns
5
Activate(a) to Activate(b)
Command Period
14
15
16
ns
5
CAS(a) to CAS(b) Command
Period
t
CCD
1
1
1
CLK
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