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參數(shù)資料
| 型號(hào)： | HYB39S16320TQ-8 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 128 x 64 pixel format, LED Backlight available |
| 中文描述： | 512K X 32 SYNCHRONOUS GRAPHICS RAM, 6 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 28/70頁 |
| 文件大?。?/td> | 563K |
| 代理商： | HYB39S16320TQ-8 |
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HYB 39S16320TQ-6/-7/-8
Semiconductor Group
28
1998-10-01
Notes
1. AC timing tests have
V
IL
= 0.4 V and
V
IH
= 2.4 V with the timing referenced to the 1.4 V crossover
point. The transition time is measured between
V
IH
and
V
IL
. All AC measurements assume
t
T
= 1 ns with the AC output load circuit shown.
2. If clock rising time is longer than 1ns, a time (
t
T
/2
0.5) ns has to be added to this parameter.
3. If
t
T
is longer than 1 ns, a time (
t
T
1) ns has to be added to this parameter.
4. These parameter account for the number of clock cycle and depend on the operating frequency
of the clock, as follows: Number of clock cycle = specified value of timing period (counted in
fractions as a whole number)
5. Self Refresh Exit is a synchronous operation and begins on the second positiv edge after CKE
returns high. Self Refresh Exit is not complete until a time period equal to
t
RC
is satisfied once the
Self Refresh Exit command is registered.
6. Any time that the refresh Period has been exceeded, a minimum of two Auto (CRB) Refresh
commands must be given to “wake-up“ the device.
7. Referenced to the time which the output achieves the open circuit condition, not to output voltage
levels.
SPT03404
CLOCK
2.4 V
0.4 V
INPUT
HOLD
t
SETUP
t
t
T
OUTPUT
1.4 V
t
LZ
AC
t
t
AC
OH
t
HZ
t
1.4 V
CL
t
CH
t
50 pF
I/O
Measurement conditions for
t
AC
and
t
OH
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| HYB39S1632TQ55 | 制造商:N/A 功能描述:NEW |
| HYB39S16400 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| HYB39S16400-1 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| HYB39S16400AT-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| HYB39S16400AT-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
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