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參數(shù)資料
| 型號： | HYM72V2005GU-50 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module |
| 中文描述： | 2M X 72 EDO DRAM MODULE, 50 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大小： | 66K |
| 代理商： | HYM72V2005GU-50 |
Semiconductor Group
2
HYM72V2005GS-50/-60
2M x 72-ECC Module
The HYM 72V2005GS-50/-60 is a 16 MByte DRAM module organized as 2 097 152 words by 72-
bit in a 168-pin, dual read-out, single-in-line package comprising nine HYB3117805BSJ 2M
×
8
EDO DRAMs in 400 mil wide SOJ-28 - packages mounted together with ceramic decoupling
capacitors on a PC board. All inputs except RAS and DQ are buffered by using BiCMOS buffers/
line drivers.
Each HYB3117805BSJ is described in the data sheet and is fully electrically tested and processed
according to Siemens standard quality procedure prior to module assembly. After assembly onto
the board, a further set of electrical tests is performed.
The density and speed of the module can be detected by the use of presence detect pins.
Ordering Information
Pin Names
Presence-Detect and ID-pin Truth Table:
Note:
1 = High Level ( Driver Output) , 0 = Low Level (Driver Output) for PDE active ( ground) . For PDE at a high
level all PD terminal are in tri-state.
Type
Ordering Code
Package
Descriptions
HYM 72V2005GS-50
L-DIM-168-22
DRAM module (access time 50 ns)
HYM 72V2005GS-60
L-DIM-168-22
DRAM module (access time 60 ns)
A0-A11,B0
A0-A10,B0
DQ0 - DQ71
RAS0, RAS2
CAS0 , CAS2
WE0, WE2
OE0, OE2
Vcc
Vss
PD1 - PD8
PDE
ID0 , ID1
N.C.
Row Address Inputs
Column Address Inputs
Data Input/Output
Row Address Strobe
Column Address Strobe
Read / Write Input
Output Enable
Power (+3.3 Volt)
Ground
Presence Detect Pins
Presence Detect Enable
ID indentification bit
No Connection
Module
ID0
ID1
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
HYM 72V2005GS-50
Vss
Vss
1
0
0
1
1
0
0
0
HYM 72V2005GS-60
Vss
Vss
1
0
0
1
1
1
1
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYM72V2005GU-60 | 3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module |
| HYM72V2005GS-50 | 2M x 72-Bit EDO-DRAM Module |
| HYM72V2005GS-50- | 2M x 72-Bit EDO-DRAM Module |
| HYM72V4000GS-50 | 4M x 72-Bit Dynamic RAM Module |
| HYM72V4010GS-50 | Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYM72V2005GU-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module |
| HYM72V2005GU-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 EDO Page Mode DRAM Module |
| HYM72V32636BLT8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 256MB |
| HYM72V32636BLT8-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|32MX64|CMOS|DIMM|168PIN|PLASTIC |
| HYM72V32636BLT8-K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|32MX64|CMOS|DIMM|168PIN|PLASTIC |
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