- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370799 > HYMR1632-845 RAMBUS DRAM Module PDF資料下載
參數(shù)資料
| 型號(hào)： | HYMR1632-845 |
| 英文描述： | RAMBUS DRAM Module |
| 中文描述： | Rambus的內(nèi)存 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 111K |
| 代理商： | HYMR1632-845 |
Rev. 0.0/ Feb. 99
Page 3
HYMR11648/11848 Series
Preliminary
Pin Definition
Signal
Pins
I/O
Type
Description
Gnd
A1, A3, A5, A7, A9, A11, A13, A15,
A17, A19, A21, A23, A25, A27, A29,
A31, A33, A39, A52, A60, A62, A64,
A66, A68, A70, A72, A74, A76, A78,
A80, A82, A84, A86, A88, A90, A92,
B1, B3, B5, B7, B9, B11, B13, B15,
B17, B19, B21, B23, B25, B27, B29,
B31, B33, B39, B52, B60, B62, B64,
B66, B68, B70, B72, B74, B76, B78,
B80, B82, B84, B86, B88, B90, B92
Ground reference for RDRAM core and interface. 72
pins.
LCFM
B10
I
RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Positive polarity.
LCFMN
B12
I
RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Negative polarity.
LCMD
B34
I
V
CMOS
Serial Command Pin. Pin used to read from and write to
the control registers. Also used for power management.
LCOL4..
LCOL0
A20, B20, A22, B22, A24
I
RSL
Column bus. 5-pin bus containing control and address
information for column accesses.
LCTM
A14
I
RSL
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Positive polarity.
LCTMN
A12
I
RSL
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Negative polarity.
LDQA8..
LDQA0
A2, B2, A4, B4, A6, B6, A8, B8, A10
I/O
RSL
Data bus A. A 9-pin bus carrying a byte of read or write
data between the Channel and the RDRAM. LDQA8 is
non-functional on x16 devices
LDQB8..
LDQB0
B32, A32, B30, A30, B28, A28, B26,
A26, B24
I/O
RSL
Data bus B. A 9-bit bus carrying a byte of read or write
data between the Channel and the RDRAM. LDQB8 is
non-functional on x16 devices.
LROW2..
LROW0
B16, A18, B18
I
RSL
Row bus. 3-pin bus containing control and address infor-
mation for row accesses.
LSCK
A34
I
V
CMOS
Clock input. Pin used to read from and write to the con-
trol registers.
NC
A16, B14, A38, B38, A40, B40, A43,
B43, A44, B44, A45, B45, A46, B46,
A47, B47, A48, B48, A49, B49, A50,
B50, A77, B79
These pins are not connected. These 24 pins are all
reserved for future use.
RCFM
B83
I
RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Positive polarity.
RCFMN
B81
I
RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Negative polarity.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYMR16416 | 32Mx16|2.5V|40|-|Direct RDRAM - 64MB RIMM |
| HYMR1816-653 | RAMBUS DRAM Module |
| HYMR1816-840 | RAMBUS DRAM Module |
| HYMR1816-845 | RAMBUS DRAM Module |
| HYMR1832-653 | RAMBUS DRAM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY-P701B | 制造商:Crouzet 功能描述: |
| HY-P701C | 制造商:Crouzet 功能描述: |
| HY-P701D | 制造商:Crouzet 功能描述: |
| HYPERLOG30180 | 功能描述:ANTENNA LOG 380MHZ-18GHZ RoHS:是 類別:RF/IF 和 RFID >> RF 天線 系列:HyperLOG® 標(biāo)準(zhǔn)包裝:1 系列:* |
| HYPERLOG4060 | 功能描述:ANTENNA LOG 400MHZ-6GHZ RoHS:是 類別:RF/IF 和 RFID >> RF 天線 系列:HyperLOG® 標(biāo)準(zhǔn)包裝:1 系列:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。