參數(shù)資料
型號(hào)： HYR186440G-845
廠商： INFINEON TECHNOLOGIES AG
英文描述： Direct RDRAM RIMM Modules (with 288 Mbit RDRAMs)
中文描述： 直接的RDRAM RIMM的模塊（帶288兆R(shí)DRAMs）
文件頁(yè)數(shù)： 5/14頁(yè)
文件大?。?/td> 385K
代理商： HYR186440G-845
HYR16xx40G / HYR18xx40G
Rambus RIMM Modules
INFINEON Technologies
5
7.01
Module Connector Pad Description
Signal
Module Connector Pads
I/O
Type
Description
GND
A1, A3, A5, A7, A9, A11,
A13, A15, A17, A19, A21,
A23, A25, A27, A29, A31,
A33, A39, A52, A60, A62,
A64, A66, A68, A70, A72,
A74, A76, A78, A80, A82,
A84, A86, A88, A90, A92,
B1, B3, B5, B7, B9, B11,
B13, B15, B17, B19, B21,
B23, B25, B27, B29, B31,
B33, B39, B52, B60, B62,
B64, B66, B68, B70, B72,
B74, B76, B78, B80, B82,
B84, B86, B88, B90, B92
–
–
Ground reference for RDRAM core
and interface. 72 PCB connector
pads.
LCFM
B10
I
RSL
Clock from master. Interface clock
used for receiving RSL signals from
the Channel. Positive polarity.
LCFMN
B12
I
RSL
Clock from master. Interface clock
used for receiving RSL signals from
the Channel. Negative polarity.
LCMD
B34
I
V
CMOS
Serial Command used to read from
and write to the control registers.
Also used for power management.
LCOL4
…
LCOL0
A20, B20, A22, B22, A24
I
RSL
Column bus. 5-bit bus containing
control and address information for
column accesses.
LCTM
A14
I
RSL
Clock to master. Interface clock
used for transmitting RSL signals to
the Channel. Positive polarity.
LCTMN
A12
I
RSL
Clock to master. Interface clock
used for transmitting RSL signals to
the Channel. Negative polarity.
LDQA8
…
LDQA0
A2, B2, A4, B4, A6, B6,
A8, B8, A10
I/O
RSL
Data bus A. A 9-bit bus carrying a
byte of read or write data between
the Channel and the RDRAM.
LDQA8 is non-functional on
modules with x16 RDRAM devices.
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