參數(shù)資料
型號(hào): HYS64T64000HU-5-A
廠商: INFINEON TECHNOLOGIES AG
英文描述: 240-Pin Unbuffered DDR2 SDRAM Modules
中文描述: 240針無緩沖DDR2 SDRAM內(nèi)存模塊
文件頁數(shù): 27/67頁
文件大?。?/td> 1527K
代理商: HYS64T64000HU-5-A
HYS[64T[3200/6400/12802]0/72T[6400/12802]0][G/H]U–[3.7/5]–A
512 Mbit DDR2 SDRAM
I
DD
Specifications and Conditions
Data Sheet
27
Rev. 0.87, 2004-06
09122003-GZEK-H4J6
4.1
I
DD
Test Conditions
For testing the
I
DD
parameters, the following timing parameters are used:
4.2
ODT (On Die Termination) Current
The ODT function adds additional current consumption to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A6 & A2 in the EMRS(1) a “week” or “strong” termination can be selected. The current
consumption for any terminated input pin, depends on the input pin is in tristate or driving 0 or 1, as long a ODT
is enabled during a given period of time.
Note:For power consumption calculations the ODT duty cycle has to be taken into account
Table 19
Parameter
I
DD
Measurement Test Conditions
Symbol
-5
PC2-3200
3-3-3
3
5
15
55
7.5
10
40
15
105
-3.7
PC2-4200
4-4-4
4
3.75
15
60
7.5
10
45
15
105
Unit
CAS Latency
Clock Cycle Time
Active to Read or Write delay
Active to Active / Auto-Refresh command period
Active bank A to Active bank B
command delay
C
Lmin
t
CKmin
t
RCDmin
t
RCmin
t
RRDmin
t
RRDmin
t
RASmin
t
RPmin
t
RFCmin
t
CK
ns
ns
ns
ns
ns
ns
ns
ns
x8
1)
x16
2)
1) For modules based on x8 components
2) For modules based on x16 components
Active to Precharge Command
Precharge Command Period
Auto-Refresh to Active / Auto-Refresh command
period
Average periodic Refresh interval
t
REFI
7.8
7.8
μs
Table 20
ODT current per terminated pin:
EMRS(1)
State
A6 = 0, A2 = 1 5
A6 = 1, A2 = 0 2.5
min.
typ.
max.
Unit
Enabled ODT current per DQ
added IDDQ current for ODT enabled;
ODT is HIGH; Data Bus inputs are
FLOATING
Active ODT current per DQ
added IDDQ current for ODT enabled;
ODT is HIGH; worst case of Data Bus inputs
are STABLE or SWITCHING.
I
ODTO
6
3
7.5
3.75
mA/DQ
mA/DQ
I
ODTT
A6 = 0, A2 = 1 10
A6 = 1, A2 = 0 5
12
6
15
7.5
mA/DQ
mA/DQ
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HYS64T32000HU-5-A 240-Pin Unbuffered DDR2 SDRAM Modules
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