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參數(shù)資料
| 型號(hào)： | HYS64V2100GCU-10 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module |
| 中文描述： | 2M X 64 SYNCHRONOUS DRAM MODULE, 8 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | HYS64V2100GCU-10 |
HYS64(72)V2100G(C)U-10
2M x 64/72 SDRAM-Module
Semiconductor Group
10
A serial presence detect storage device - E
2
PROM - is assembled onto the module. Information
about the module configuration, speed, etc. is written into the E
2
PROM device during module
production using a serial presence detect protocol ( I
2
C synchronous 2-wire bus)
SPD-Table:
Byte#
Description
SPD Entry Value
Hex
x64
80
08
04
0B
09
x72
80
08
04
0B
09
0
1
2
3
4
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses (without BS bits)
Number of Column Addresses (for x 8
SDRAM)
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access time from Clock at CL=3
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
128
256
SDRAM
11
9
5
6
7
8
9
10
11
12
1
01
40
00
01
A0
80
00
80
01
48
00
01
A0
80
02
80
64 / 72
0
LVTTL
8.0 / 10.0 / 12.0 ns
8.0 ns
none / ECC
Self-Refresh,
15.6
μ
s
x8
n/a / x8
t
ccd
= 1 CLK
13
14
15
SDRAM width, Primary
Error Checking SDRAM data width
Minimum clock delay for back-to-back ran-
dom column address
Burst Length supported
Number of SDRAM banks
Supported CAS Latencies
08
00
01
08
08
01
16
17
18
1, 2, 4, 8 & full page
2
CAS latency = 1, 2
& 3
CS latency = 0
Write latency = 0
non buffered/non
reg.
Vcc tol +/- 10%
15.0 ns
9.0 ns
30 ns
27 ns
30 ns
8F
02
07
8F
02
07
19
20
21
CS Latencies
WE Latencies
SDRAM DIMM module attributes
01
01
00
01
01
00
22
23
24
25
26
27
SDRAM Device Attributes :General
SDRAM Cycle Time at CL = 2
SDRAM Access time from Clock at CL = 2
SDRAM Cycle Time at CL = 1
SDRAM Access time from Clock at CL=1
Minimum Row Precharge Time
06
F0
90
78
6C
1E
06
F0
90
78
6C
1E
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72V2100GCU-10 | 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module |
| HYS64V2100G | 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module |
| HYS64V2100GU-10 | 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module |
| HYS72V2100GU-10 | 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module |
| HYS64V2200GU-8 | 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64V2100GU-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module |
| HYS64V2200GU-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V2200GU-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V2200GU-8-3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V32200GU-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3 V 16M x 64/72-Bit SDRAM Modules 3.3 V 32M x 64/72-Bit SDRAM Modules 3.3 V 64M x 64/72-Bit SDRAM Modules |
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