參數(shù)資料
型號(hào): HYS72T128000GR
廠商: INFINEON TECHNOLOGIES AG
英文描述: DDR2 Registered Memory Modules
中文描述: 注冊(cè)的DDR2內(nèi)存模塊
文件頁(yè)數(shù): 17/33頁(yè)
文件大?。?/td> 936K
代理商: HYS72T128000GR
HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
Registered DDR2 SDRAM Modules
Data Sheet
Preliminary
17
Rev. 0.85, 2004-04
5.0 Electrical Characteristics & AC Timings
5.1 AC Timing Parameter by Speed Grade
(Component level data, for reference only)
Symbol
Parameter
-5
DDR2-400
-3.7
DDR2-533
Unit
Min
Max
Min
Max
t
AC
DQ output access time from CK / CK
600
+
600
-500
+500
ps
t
DQSCK
t
CH
t
CL
t
HP
DQS output access time from CK / CK
500
+
500
450
+
450
ps
CK, CK high-level width
0.45
0.55
0.45
0.55
t
CK
CK, CK low-level width
0.45
0.55
0.45
0.55
t
CK
Clock Half Period
min. (t
CL,
t
CH)
min. (t
CL,
t
CH)
t
CK
Clock cycle time
CL = 3
5000
8000
5000
8000
ps
CL = 4 & 5
5000
8000
3750
8000
ps
t
IS
t
IH
t
DS
t
DH
t
IPW
t
DIPW
t
HZ
t
LZ(DQ)
t
LZ(DQS)
Address and control input setup time
600
-
600
-
ps
Address and control input hold time
600
-
600
-
ps
DQ and DM input setup time
400
-
350
-
ps
DQ and DM input hold time
400
-
350
-
ps
Control and Addr. input pulse width (each input)
0.6
-
0.6
-
t
CK
DQ and DM input pulse width (each input)
0.35
-
0.35
-
t
CK
Data-out high-impedance time from CK / CK
-
tACmax
-
tACmax
ps
DQ low-impedance from CK / CK
2*tACmin
tACmax
2*tACmin
tACmax
ps
DQS low-impedance from CK / CK
tACmin
tACmax
tACmin
tACmax
ps
t
DQSQ
DQS-DQ skew
(for DQS & associated DQ signals)
-
350
-
300
ps
t
QHS
t
QH
Data hold skew factor
-
450
-
400
ps
Data Output hold time from DQS
t
HP-tQHS
WL
-0.25
-
t
HP-tQHS
WL
-0.25
-
t
DQSS
Write command to 1st DQS latching transition
WL
+0.25
WL
+0.25
t
CK
t
DQSL,H
DQS input low (high) pulse width (write cycle)
0.35
-
0.35
-
t
CK
t
DSS
DQS falling edge to CLK setup time
(write cycle)
0.2
-
0.2
-
t
CK
t
DSH
DQS falling edge hold time from CLK
(write cycle)
0.2
-
0.2
-
t
CK
t
MRD
t
WPRE
t
WPST
t
RPRE
t
RPST
t
RAS
t
RC
t
RFC
Mode register set command cycle time
2
-
2
-
t
CK
Write preamble
0.25
-
0.25
-
t
CK
Write postamble
0.40
0.60
0.40
0.60
t
CK
Read preamble
0.9
1.1
0.9
1.1
t
CK
Read postamble
0.40
0.60
0.40
0.60
t
CK
Active to Precharge command
45
70000
45
70000
ns
Active to Active/Auto-refresh command period
60
-
60
-
ns
Auto-refresh to Active/Auto-refresh command period
105
-
105
-
ns
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