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| 型號(hào)： | HYS72T256020HR-5-A |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | DDR2 Registered Memory Modules |
| 中文描述： | 注冊(cè)的DDR2內(nèi)存模塊 |
| 文件頁數(shù)： | 18/33頁 |
| 文件大?。?/td> | 936K |
| 代理商： | HYS72T256020HR-5-A |
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HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
Registered DDR2 SDRAM Modules
Data Sheet
Preliminary
18
Rev. 0.85, 2004-04
5.2 ODT AC Electrical Characteristics and Operating Conditions
(all speed bins)
t
RCD
Active to Read or Write delay (with and without Auto-Pre-
charge) delay
15
-
15
-
ns
t
RP
Precharge command period
15
-
15
-
ns
t
RRD
Active bank A to Active bank
B command
x4 & x8
(1k page size)
7.5
-
7.5
-
ns
t
CCD
t
WR
t
DAL
t
WTR
t
RTP
CAS A to CAS B Command Period
2
-
2
-
t
CK
Write recovery time
15
-
15
-
ns
Auto precharge write recovery + precharge time
WR+tRP
-
WR+tRP
-
t
CK
Internal write to read command delay
10
-
7.5
-
ns
Internal read to precharge command delay
7.5
-
7.5
-
ns
t
XARD
Exit power down to any valid command
(other than NOP or Deselect)
2
-
2
-
t
CK
t
XARDS
Exit active power-down mode to read command
(slew exit, lower power)
6 - AL
-
6 - AL
-
t
CK
t
XP
Exit precharge power-down to any valid command (other
than NOP or Deselect)
2
-
2
-
t
CK
t
XSRD
t
XSNR
t
CKE
t
OIT
Exit Self-Refresh to read command
200
-
200
-
t
CK
Exit Self-Refresh to non-read command
tRFC + 10
-
tRFC + 10
-
ns
CKE minimum high and low pulse width
3
-
3
-
t
CK
OCD drive mode output delay
0
12
0
12
ns
t
DELAY
Minimum time clocks remain ON after CKE asynchro-
nously drops low
tIS+tCK
+tIH
-
tIS+tCK
+tIH
-
ns
t
REFI
Average Periodic Refresh
Interval
0
o
C - 85
o
C
-
7.8
-
7.8
μs
85
o
C - 95
o
C
-
3.9
-
3.9
1. For details and notes see the relevant INFINEON component datasheet
2. Timing definition and values for tis, tih, tds and tdh may change due to actual JEDEC work. This may also effect the SPD code
for these parameters.
Symbol Parameter / Condition
min.
max.
Units
t
AOND
ODT turn-on delay
2
2
t
CK
t
AON
ODT turn-on
DDR2-400/533
tAC(min)
tAC(max) + 1 ns
ns
DDR2-667
tAC(min)
tAC(max) + 0.7 ns
t
AONPD
t
AOFD
t
AOF
t
AOFPD
t
ANPD
t
AXPD
ODT turn-on (Power-Down Modes)
tAC(min) + 2 ns
2 t
CK +
tAC(max) + 1 ns
ns
ODT turn-off delay
2.5
2.5
t
CK
ns
ODT turn-off
tAC(min)
tAC(max) + 0.6 ns
ODT turn-off delay (Power-Down Modes)
tAC(min) + 2 ns
2.5 t
CK +
tAC(max) + 1 ns
ns
ODT to Power Down Mode Entry Latency
3
-
t
CK
t
CK
ODT Power Down Exit Latency
8
-
Symbol
Parameter
-5
DDR2-400
-3.7
DDR2-533
Unit
Min
Max
Min
Max
相關(guān)PDF資料 |
PDF描述 |
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| HYS72T256220HR-5-A | DDR2 Registered Memory Modules |
| HYS72T128000HR-5-A | DDR2 Registered Memory Modules |
| HYS72T64001GR | DDR2 Registered DIMM Modules |
| HYS72T64020GR-37-A | DDR2 Registered DIMM Modules |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72T256020HU-3.7-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T256020HU-3-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T256020HU-3S-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T256020HU-5-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T256023 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules |
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