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參數(shù)資料
| 型號： | HYS72T256020HR |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | RES 1.1 OHM 1/16W 5% 0402 SMD |
| 中文描述： | 注冊的DDR2內(nèi)存模塊 |
| 文件頁數(shù)： | 16/33頁 |
| 文件大?。?/td> | 936K |
| 代理商： | HYS72T256020HR |
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HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
Registered DDR2 SDRAM Modules
Data Sheet
Preliminary
16
Rev. 0.85, 2004-04
4.5 I
DD
Measurement Conditions (cont’d)
For testing the IDD parameters, the following timing parameters are used:
4.6 ODT (On Die Termination) Current
The ODT function adds additional current consumption to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A6 & A2 in the EMRS(1) a “week” or “strong” termination can be selected. The cur-
rent consumption for any terminated input pin, depends on the input pin is in tri-state or driving “0” or “1”, as long
a ODT is enabled during a given period of time.
ODT current per terminated pin:
Parameter
Symbol
PC2-3200R “-5“
PC2-4300R “-3.7”
Unit
3-3-3
4-4-4
CAS Latency
CLmin
3
4
tCK
Clock Cycle Time
tCKmin
5
3.75
ns
Active to Read or Write delay
tRCDmin
15
15
ns
Active to Active / Auto-Refresh command period
tRCmin
60
60
ns
Active bank A to Active bank B command delay
x4 & x8
tRRDmin
7.5
7.5
ns
Active to Precharge Command
tRASmin
45
45
ns
Precharge Command Period
tRPmin
15
15
ns
Auto-Refresh to Active / Auto-Refresh command period
tRFCmin
105
105
ns
Average periodic Refresh interval
tREFI
7.8
7.8
μs
EMRS(1) State min. typ. max.
Unit
Enabled ODT current per DQ
added IDDQ current for ODT enabled;
ODT is HIGH; Data Bus inputs are FLOATING
IODTO
A6 = 0, A2 = 1
5
6
7.5
mA/DQ
A6 = 1, A2 = 0
2.5
3
3.75
mA/DQ
Active ODT current per DQ
added IDDQ current for ODT enabled;
ODT is HIGH; worst case of Data Bus inputs are STABLE or SWITCHING.
IODTT
A6 = 0, A2 = 1
10
12
15
mA/DQ
A6 = 1, A2 = 0
5
6
7.5
mA/DQ
note: For power consumption calculations the ODT duty cycle has to be taken into account
相關(guān)PDF資料 |
PDF描述 |
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| HYS72T256220GR | DDR2 Registered Memory Modules |
| HYS72T256220HR | DDR2 Registered Memory Modules |
| HYB18T512400AC-37 | M39012 MIL RF CONNECTOR |
| HYB18T512400AC-5 | M39012 MIL RF CONNECTOR |
| HYS72T256020HR-37-A | DDR2 Registered Memory Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72T256020HR-37-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DDR2 Registered Memory Modules |
| HYS72T256020HR-5-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DDR2 Registered Memory Modules |
| HYS72T256020HU-3.7-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T256020HU-3-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
| HYS72T256020HU-3S-A | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Unbuffered DDR2 SDRAM Modules |
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