參數(shù)資料
型號(hào)： HYS72T512420EFA
廠商： QIMONDA
英文描述： 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products
中文描述： 240針全緩沖DDR2內(nèi)存模組DDR2 SDRAM的符合RoHS產(chǎn)品
文件頁(yè)數(shù)： 19/37頁(yè)
文件大?。?/td> 1270K
代理商： HYS72T512420EFA
HYS72T512420EFA–[25F/3S]–C
Fully-Buffered DDR2 SDRAM Modules
Internet Data Sheet
Rev.1.20, 2007-10-19
03202007-06NE-DYYI
19
5
Current Spec. and Conditions
The following table provides an overview of the measurement conditions.
TABLE 13
I
DD
Measurement Conditions
Notes
1. Primary channel Drive strength at 100 % with De-emphasis at -6.5 dB
2. Secondary channel drive strength at 60 % with De-emphasis at -3 dB when enabled.
3. Address and Data fields provide a 50 % toggle rate on DRAM data and link lanes.
4. Burst Length = 4.
5. 10 lanes southbound and 14 lanes northbound are enabled and active (12 lanes NB if non-ECC DIMM).
6. Modeled with 27
Ω
termination for command, address, and clocks, and 47
Ω
termination for control.
7. Termination is referenced to V
TT
= V
DD
/ 2.
Parameter
Symbol
Idle Current, single or last DIMM
L0 state, idle (0 BW)
Primary channel enabled, Secondary channel disabled
CKE high. Command and address lines stable.
DRAM clock active
Idle Current, first DIMM
L0 state, idle (0 BW)
Primary and Secondary channels enabled.
CKE high. Command and address lines stable.
DRAM clock active
Active Power
L0 state
50% DRAM BW, 67% read, 33% write.
Primary and Secondary channels enabled.
DRAM clock active, CKE high.
Training
Primary and Secondary channels enabled.
100% toggle on all channels lanes.
DRAMs idle (0 BW).
CKE high. Command and address lines stable.
DRAM clock active.
IBIST
Over all IBIST modesDRAM Idle (0 BW)Primary channel EnabledSecondary channel EnabledCKE high.
Command and Address lines stableDRAM clock active
MemBIST
Over all MemBIST modes
>
50% DRAM BW (as dictated by the AMB)Primary channel EnabledSecondary
channel EnabledCKE high. Command and Address lines stableDRAM clock active
Electrical Idle
DRAM Idle (0 BW)Primary channel DisabledSecondary channel DisabledCKE low. Command and Address
lines FloatedDRAM clock active, ODT and CKE driven low
I
CC_Idle_0
I
DD_Idle_0
I
CC_Idle_1
I
DD_Idle_1
I
CC_Active_1
I
DD_Active_1
I
CC_Training
I
DD_Training
I
CC_IBIST
I
DD_IBIST
I
CC_MEMBIST
I
DD_MEMBIST
I
CC_EI
I
DD_EI
相關(guān)PDF資料
PDF描述
HYS72T512420EFA-25F-C 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products
HYS72T512420EFA-3S-C 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products
HYS72T512422HFN-3S-A 240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T512522HFN-3.7-A 240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T512522HFN-3S-A 240-Pin Fully-Buffered DDR2 SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T512420EFA-25F-C 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products
HYS72T512420EFA-3S-C 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products
HYS72T512422HFN 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T512422HFN-3.7-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T512422HFN-3S-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
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