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參數(shù)資料
| 型號： | I74F652AD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Transceivers/registers |
| 中文描述： | F/FAST SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | PLASTIC, SOT-137-1, SO-24 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 168K |
| 代理商： | I74F652AD |
Philips Semiconductors
Product specification
74F651A/74F652A
Transceivers/registers
1999 Jun 23
5
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the 74F651A
and 74F652A. The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins
determine the direction of the data flow.
BUS MANAGEMENT FUNCTIONS
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A AND/OR B
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
BUS A
BUS A
BUS A
BUS A
BUS B
BUS B
BUS B
BUS B
SF00409
L
L
X
X
X
L
H
H
X
X
L
X
X
H
↑
X
X
X
L
X
X
↑
↑
X
X
L
H
↑
X
X
H
L
H or L H or L
H
H
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OEAB
OEBA
CPAB
CPBA
SAB
SBA
An
Bn
74F651A
74F652A
L
H
H or L
↑
↑
↑
H or L
↑
X
H or L
↑
H or L
↑
↑
↑
X
X
X
Input
Input
Isolation
Isolation
L
H
X
X
Input
Input
Store A and B data
Store A and B data
X
H
X
X
Input
Unspecified*
Store A, hold B
Store A hold B
H
H
L
X
Input
Output
Store A in both registers
Store A in both registers
L
X
X
X
Unspecified*
Input
Hold A, store B
Hold A, store B
L
L
X
L
Output
Input
Store B in both registers
Store B in both registers
L
L
X
L
Output
Input
Real time B data to A bus
Real time B data to A bus
L
L
X
H or L
X
H
Output
Input
Stored B data to A bus
Stored B data to A bus
H
H
X
X
L
X
Input
Output
Real time A data to B bus
Real time A data to B bus
H
H
H or L
X
H
X
Input
Output
Stored A data to B bus
Stored A data to B bus
H
L
H or L
H or L
H
H
Output
Output
Stored A data to B bus
Stored A data to B bus
H
L
H or L
H or L
H
H
Output
Output
Stored B data to A bus
Stored B data to A bus
Notes to function table
1. H =
High-voltage level
2. L
=
Low-voltage level
3. *
=
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are
always enabled, i.e., data at the bus pins will be stored on every low-to-high transition of the clock.
4.
↑
=
Low-to-high clock transition
5. X =
Don’t care
相關PDF資料 |
PDF描述 |
|---|---|
| I74F652AN | Transceivers/registers |
| I74F656AN | Octal buffer/driver with parity, non-inverting 3-State |
| I74F657DB | Octal transceiver with 8-bit parit generator/checker |
| I74F657D | Octal transceiver with 8-bit parit generator/checker |
| I74F657N | Octal transceiver with 8-bit parit generator/checker |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| I74F652AD-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single 8-bit Bus Transceiver |
| I74F652AN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Transceivers/registers |
| I74F652AN-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single 8-bit Bus Transceiver |
| I74F655AD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Inverting Buffer/Driver |
| I74F655ADB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Inverting Buffer/Driver |
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