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| 型號(hào)： | IA82510-PLC28I-00 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 58K |
| 代理商： | IA82510-PLC28I-00 |
IA82510
ASYNCHRONOUS SERIAL CONTROLLER
DC Characteristics
Data Sheet
As of Production Ver. 01
Copyright
2001
innov
ASIC
The End of Obsolescence
ENG211001219-01
www.innovasic.com
Customer Support:
Page 6 of 11
1-888-824-4184
Symbol
Parameter
Notes
Min
Max
Unit
V
IL
Input Low Voltage
(1)
-0.5
0.7
V
V
IH1
Input High Voltage-Cerdip
(1)
2.1
V
DD
+.07
V
V
IH2
Input High Voltage-LCC
(2)
2.1
V
DD
+.07
V
V
OL
Output Low Voltage
(2), (8)
0.4
V
V
OH
Output High Voltage
(3), (8)
2.4
V
I
LI
Input Leakage Current
(4)
±1
μA
I
LO
3-State Leakage Current
(5)
±1
μA
I
CC
Power Supply Current
(6)
1.12
mA/MHz
I
PU
Strapping Pullup Resistor
(12)
-283
-137
A
I
STBY
Standby Supply Current
(9)
100
μA
I
OHR
RTSn, DTRn Strapping Current
(10)
1.92
mA
I
OLR
RTSn, DTRn Strapping Current
(11)
N/A
mA
C
IN
Input Capacitance
(7)
5
pF
C
IO
I/O Capacitance
(7)
6
pF
C
XTAL
X1, X2 Load
6
pF
NOTES:
1. Does not apply to CLK/X1 pin, when configured as crystal oscillator input (X1).
2. @ I
OL
= 1.92 mA
4. 0< V
IN
< V
CC
.
5. 0.4V < V
OUT
< V
CC
- 0.4V
6. V
DD
= 5.5V, V
IL
= 0.7V (max), V
IH
= V
DD
- 0.7V (min), Typ. Val = 1.12 mA/MHz (Not Tested), Ext. 1X CLK, I
OL
= I
OH
= 0.
7. Freq. = 1MHz.
8. Does not apply to OUT2/X2 pin, when configured as crystal oscillator output (X2).
10. Applies only during hardware reset for clock configuration options. Strapping current for logic HIGH.
11. Applies only during hardware reset for clock configuration options. Strapping current for logic LOW
12. Inputs (RTSn, DTRn, TB) with Pullups tested @ V
in
= 0.0V V
DD
= 5.5V
3. @ I
OH
= 1.92 mA
Static IDD current is exclusive of input/output drive requirements and is
measured with the clocks stopped and all inputs tied to VDD or VSS, configured
to draw minimum current.
9. Freq. = 1MHz. But, input clock not running.
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