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| 型號： | IBM13N16644HCC-360T |
| 英文描述： | x64 SDRAM Module |
| 中文描述： | X64的內(nèi)存模塊 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 378K |
| 代理商： | IBM13N16644HCC-360T |
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 9 of 20
IBM13N16644HCC
IBM13N16734HCC
16M x 64/72 Two-Bank Unbuffered SDRAM Module
19L7296.E93875B
12/99
127
Attributes for Clock Frequency defined in
byte 126
-260
CK0, CK1, CK2, CK3, CL3,
CL2, concurrent AP
CK0, CK1, CK2, CK3, CL3,
concurrent AP
CL3, CL2, concurrent AP
F7
-360
F5
-10
07
128 -
255
Open for Customer Use
Undefined
00
Serial Presence Detect (Part 3 of 3)
Byte #
Description
SPD Entry Value
Serial PD Data Entry
(Hexadecimal)
Notes
1. See the AC output load circuit in the AC Characteristics section below
2. cc = Checksum Data byte, 00-FF (Hex)
3. “R” = Alphanumeric revision code, A-Z, 0-9
4. rr = ASCII coded revision code byte “R”
5. yy = Binary coded decimal year code, 00-99 (Decimal)
00-63 (Hex)
6. ww = Binary coded decimal week code, 01-52 (Decimal)
01-34 (Hex)
7. ss = Serial number data byte, 00-FF (Hex)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM13N16734HCB-75AT | x72 SDRAM Module |
| IBM13N16734HCC-10T | x72 SDRAM Module |
| IBM13N16734HCC-260T | x72 SDRAM Module |
| IBM13N16644HCC | 16M x 64 Two-Bank Unbuffered SDRAM Module(16M x 64 2組不帶緩沖同步動態(tài)RAM模塊) |
| IBM13N16734HCC | 16M x 72 Two-Bank Unbuffered SDRAM Module(16M x 72 2組不帶緩沖同步動態(tài)RAM模塊) |
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