參數(shù)資料
型號(hào)： IBM25NPE405H-3DA200CZ
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA580
封裝： 35 MM, PLASTIC, EBGA-580
文件頁(yè)數(shù)： 35/64頁(yè)
文件大?。?/td> 1050K
代理商： IBM25NPE405H-3DA200CZ
Advance Information
PowerNPTM NPe405H Embedded Processor Data Sheet
40
PHY0RxDV[PHY0CrS1DV]
Receive Data Valid. Data on the Data Bus is valid when
this signal is activated. Deassertion of this signal indicates
end of the frame reception (MII 0).
or
Carrier sense data valid ([RMII 1])
I
5V tolerant
3.3V LVTTL
1, 5
PHY0RxErr[PHY0Rx0Er]
Receive Error. This signal comes from the PHY and is
synchronous with PHY0RxClk (MII 0 [RMII 0]).
I
5V tolerant
3.3V LVTTL
1, 5
PHY0TxClk[PHY0RefClk]
Transmit medium clock. This signal is generated the PHY
([MII 0]).
or
Reference Clock [RMII and SMII].
I
5V tolerant
3V LVTTL
1, 4
[PHY1Col][PHY1Rx3Er]
Collision [receive error] signal from the PHY. This is an
asynchronous signal ([MII 1]).
or
Receive Error. This signal comes from the PHY and is
synchronous with PHY1RxClk ([RMII 3]).
I
5V tolerant
3.3V LVTTL
1, 5
[PHY1CrS][PHY1CrS2DV]
Carrier Sense signal from the PHY. This is an
asynchronous signal ([MII 1]).
or
Carrier Sense Data Valid ([RMII 2]).
I
5V tolerant
3.3V LVTTL
[PHY1RxClk]
Receiver medium clock. This signal is generated by the
PHY ([MII 1]).
I
5V tolerant
3.3V LVTTL
1, 4
[PHY1RxDV][PHY1CrS3DV]
Receive Data Valid ([MII 0]).
or
Carrier Sense Data Valid ([RMII 3]).
i
5V tolerant
3.3V LVTTL
[PHY1RxErr][PHY1Rx2Er]
Receive Error. This signal comes from the PHY and is
synchronous with PHY1RxClk ([MII 1][RMII 2]).
I
5V tolerant
3.3V LVTTL
[PHY1TxClk]
Transmit medium clock. This signal is generated the PHY
([MII 1]).
I
5V tolerant
3.3V LVTTL
1, 4
SDRAM Interface
MemData0:31
Memory Data bus
Notes:
1. MemData0 is the most significant bit (msb).
2. MemData31 is the least significant bit (lsb).
I/O
3.3V LVTTL
4
MemAddr12:0
Memory Address bus.
Notes:
1. MemAddr12 is the most significant bit (msb).
2. MemAddr0 is the least significant bit (lsb).
O
3.3V LVTTL
Signal Functional Description (Part 4 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
to 3.3V, 10k to 5V)
3. Must pull down (recommended value is 1k
)
4. If not used, must pull up (recommended value is 3k
to 3.3V)
5. If not used, must pull down (recommended value is 1k
)
Signal Name
Description
I/O
Type
Notes
相關(guān)PDF資料
PDF描述
IBM25NPE405L-3DA200CZ 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324
IBM25NPE405L-3FA200CZ 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324
IBM25NPE405L-3FA266CZ 32-BIT, 266 MHz, RISC PROCESSOR, PBGA324
IBM25PPC405EP-3GB133CZ 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385
IBM25PPC405EP-3GB133C 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IBM25NPE405L-3FA133C 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerNP
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IBM25NPE405L-3FA200CZ 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerNP
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