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參數(shù)資料
| 型號(hào)： | IC41C4100-60TI |
| 英文描述： | 1Mx4 bit Dynamic RAM with EDO Page Mode |
| 中文描述： | 1Mx4位動(dòng)態(tài)RAM與江戶頁面模式 |
| 文件頁數(shù)： | 19/21頁 |
| 文件大?。?/td> | 250K |
| 代理商： | IC41C4100-60TI |
IC41C4100
IC41LV4100
Integrated Circuit Solution Inc.
DR027-0A 09/05/2001
19
HIDDEN REFRESH CYCLE
(1)
(
WE
= HIGH;
OE
= LOW)
CBR REFRESH CYCLE
(Addresses;
WE
,
OE
= DON'T CARE)
Notes:
1. A Hidden Refresh may also be performed after a Write Cycle. In this case,
WE
= LOW and
OE
= HIGH.
2. t
OFF
is referenced from rising edge of
RAS
or
CAS
, whichever occurs last.
t
RAS
t
RAS
t
RP
t
RP
I/O
CAS
RAS
Open
t
CP
t
RPC
t
CSR
t
CHR
t
RPC
t
CSR
t
CHR
t
RAS
t
RAS
t
RP
CAS
RAS
t
CRP
t
RCD
t
RSH
t
CHR
t
AR
t
ASC
t
RAD
t
RAH
ADDRESS
Row
Column
t
ASR
t
RAL
t
CAH
I/O
Open
Open
Valid Data
t
AA
t
CAC
t
RAC
t
CLZ
t
OFF
(2)
OE
t
OE
t
ORD
t
OD
Undefined
Don
’
t Care
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