FN4910.21 February 22, 2010 output voltages under increasing load current. The on-chip switching regulator ensures the transmitters will
參數(shù)資料
型號： ICL3222EIA-T
廠商： Intersil
文件頁數(shù)： 11/33頁
文件大?。?/td> 0K
描述： IC 2DRVR/2RCVR RS232 3V 20-SSOP
標準包裝： 1,000
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 2/2
規(guī)程： RS232
電源電壓： 3 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應商設備封裝： 20-SSOP
包裝： 帶卷 (TR)
19
FN4910.21
February 22, 2010
output voltages under increasing load current. The
on-chip switching regulator ensures the transmitters will
supply at least ±5V during worst case conditions (15mA
for paralleled V+ transmitters, 7.3mA for single V-
transmitter). The Automatic Power-Down feature does
not work with a mouse, so FORCEOFF and FORCEON
should be connected to VCC.
High Data Rates
The ICL32xxE maintain the RS-232 ±5V minimum
transmitter output voltages even at high data rates.
Figure 10 details a transmitter loopback test circuit, and
Figure 11 illustrates the loopback test result at 120kbps.
For this test, all transmitters were simultaneously driving
RS-232 loads in parallel with 1000pF, at 120kbps.
Figure 12 shows the loopback results for a single
transmitter driving 1000pF and an RS-232 load at
250kbps. The static transmitters were also loaded with
an RS-232 receiver.
Interconnection with 3V and 5V
Logic
The ICL32XX directly interface with 5V CMOS and TTL
logic families. Nevertheless, with the ICL32XX at 3.3V,
and the logic supply at 5V, AC, HC, and CD4000 outputs
can drive ICL32XX inputs, but ICL32XX outputs do not
reach the minimum VIH for these logic families. See
Table 4 for more information.
FIGURE 10. TRANSMITTER LOOPBACK TEST CIRCUIT
FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e.,
DOUBLE CURRENT AXIS FOR TOTAL
VOUT+ CURRENT)
TRANSMIT
T
E
R
OUTP
U
T
VOL
TA
GE
(V)
LOAD CURRENT PER TRANSMITTER (mA)
024
68
10
-6
-4
-2
0
2
4
6
-5
-3
-1
1
3
5
1
3579
VOUT+
VOUT -
VCC
VOUT+
VOUT -
T1
T2
T3
VCC = 3.0V
ICL3241E, ICL3243E
ICL32xxE
VCC
FORCEOFF
C1
C2
C4
C3
+
1000pF
V+
V-
5K
TIN
ROUT
C1+
C1-
C2+
C2-
RIN
TOUT
+
VCC
0.1F
VCC
EN
SHDN OR
FIGURE 11. LOOPBACK TEST AT 120kbps
FIGURE 12. LOOPBACK TEST AT 250kbps
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH
VARIOUS SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE
(V)
VCC
SUPPLY
VOLTAGE
(V)
COMPATIBILITY
3.3
Compatible with all CMOS
families.
5
Compatible with all TTL and
CMOS logic families.
T1IN
T1OUT
R1OUT
5s/DIV
VCC = +3.3V
5V/DIV
C1 - C4 = 0.1F
T1IN
T1OUT
R1OUT
2s/DIV
5V/DIV
VCC = +3.3V
C1 - C4 = 0.1F
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
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