FN4910.21 February 22, 2010 With any of the control schemes, the time required to exit power-down, and resume transmission is only 100s. A mous" />
參數(shù)資料
型號(hào)： ICL3223ECA-T
廠商： Intersil
文件頁數(shù)： 9/33頁
文件大小： 0K
描述： IC 2DRVR/2RCVR RS232 3V 20-SSOP
標(biāo)準(zhǔn)包裝： 1,000
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 2/2
規(guī)程： RS232
電源電壓： 3 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 20-SSOP
包裝： 帶卷 (TR)
17
FN4910.21
February 22, 2010
With any of the control schemes, the time required to
exit power-down, and resume transmission is only
100s. A mouse, or other application, may need more
time to wake up from shutdown. If automatic
power-down is being utilized, the RS-232 device will
reenter power-down if valid receiver levels aren’t
reestablished within 30s of the ICL32xxE powering up.
Figure 5 illustrates a circuit that keeps the ICL32xxE from
initiating automatic power-down for 100ms after
powering up. This gives the slow-to-wake peripheral
circuit time to reestablish valid RS-232 output levels.
Automatic Power-Down
(ICL3221E, ICL3223E, ICL3243E Only)
Even greater power savings is available by using the
devices which feature an automatic power-down
function. When no valid RS-232 voltages (see Figure 6)
are sensed on any receiver input for 30s, the charge
pump and transmitters power-down, thereby reducing
supply current to 1A. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. The ICL32xxE powers back up whenever it
detects a valid RS-232 voltage level on any receiver
input. This automatic power-down feature provides
additional system power savings without changes to the
existing operating system.
Automatic power-down operates when the FORCEON
input is low, and the FORCEOFF input is high. Tying
FORCEON high disables automatic power-down, but
manual power-down is always available via the
overriding FORCEOFF input. Table 2 summarizes the
automatic power-down functionality.
FIGURE 3. DISABLED RECEIVERS PREVENT POWER
DRAIN
ICL324XE
TRANSITION
RX
TX
R2OUTB
R2OUT
T1IN
FORCEOFF = GND
VCC
TO
R2IN
T1OUT
VOUT = HI-Z
POWERED
OR SHDN = GND, EN = VCC
DETECTOR
DOWN
UART
WAKE-UP
LOGIC
FIGURE 4. CONNECTIONS FOR MANUAL
POWER-DOWN WHEN NO VALID
RECEIVER SIGNALS ARE PRESENT
PWR
FORCEOFF
INVALID
CPU
I/O
FORCEON
ICL3221E,
MGT
LOGIC
UART
ICL3243E
ICL3223E,
FIGURE 5. CIRCUIT TO PREVENT AUTO
POWER-DOWN FOR 100ms AFTER
FORCED POWER-UP
ICL3221E, ICL3223E, ICL3243E
FORCEOFF
FORCEON
POWER
MASTER POWER-DOWN LINE
1M
0.1F
MANAGEMENT
UNIT
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER
LEVELS
0.3V
-0.3V
-2.7V
2.7V
INVALID LEVEL - POWER-DOWN OCCURS AFTER 30s
VALID RS-232 LEVEL - ICL32xxE IS ACTIVE
INDETERMINATE - POWER-DOWN MAY OR
MAY NOT OCCUR
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
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