參數(shù)資料
型號: ICM7226B
廠商: Intersil Corporation
元件分類: 通用總線功能
英文描述: 8-Digit, Multi-Function, Frequency Counter/Timer
中文描述: 8位數(shù)字,多功能,頻率計數(shù)器/計時器
文件頁數(shù): 11/19頁
文件大?。?/td> 173K
代理商: ICM7226B
9-25
Overflow Indication
When overflow happens in any measurement it will be indicated
on the decimal point of the digit 8. A separate LED indicator can
be used. Figure 14 shows how to connect this indicator.
Time Interval Measurement
When in the
time interval
mode and measuring a single
event, the lCM7226A and lCM7226B must first be “primed”
prior to measuring the event of interest. This is done by first
generating a negative going edge on Channel A followed by a
negative going edge on Channel B to start the “measurement
interval”. The inputs are then primed ready for the measure-
ment. Positive going edges on A and B, before or after the
priming, will be needed to restore the original condition.
Priming can be easily accomplished using the circuit in
Figure 15.
Following the priming procedure (when in single event or 1
cycle range) the device is ready to measure one (only) event.
When timing repetitive signals, it is not necessary to “prime”
the lCM7226A and lCM7226B as the first alternating signal
states automatically prime the device. See Figure 1.
During any time interval measurement cycle, the ICM7226A
and lCM7226B requires 200ms following B going low to
update all internal logic. A new measurement cycle will not
take place until completion of this internal update time.
Oscillator Considerations
The oscillator is a high gain complementary FET inverter. An
external resistor of 10M
or 22M
should be connected
between the oscillator input and output to provide biasing.
The oscillator is designed to work with a parallel resonant
10MHz quartz crystal with a static capacitance of 22pF and
a series resistance of less than 35
. Among suitable
crystals is the 10MHz CTS KNIGHTS ISI-002.
For a specific crystal and load capacitance, the required g
M
can be calculated as follows:
C
O
C
L
C
O
= Crystal Static Capacitance
R
S
= Crystal Series Resistance
C
IN
= Input Capacitance
C
OUT
= Output Capacitance
ω
= 2
π
f
The required g
M
should not exceed 50% of the g
M
specified
for the lCM7226 to insure reliable startup. The OSCillator
INPUT and OUTPUT pins each contribute about 4pF to C
IN
and C
OUT
. For maximum stability of frequency, C
IN
and
C
OUT
should be approximately twice the specified crystal
static capacitance.
In cases where non decade prescalers are used, it may be
desirable to use a crystal which is neither 10MHz or 1MHz.
In that case both the multiplex rate and time between
measurements will be different. The multiplex rate is:
for 10MHz mode and
for the
1MHz mode. The time between measurements is
in
the 10MHz mode and
in the 1MHz mode.
The buffered oscillator output should be used as an oscillator
test point or to drive additional logic; this output will drive one
low power Schottky TTL load. When the buffered oscillator
output is used to drive CMOS or the external oscillator input,
a 10k
resistor should be added from the buffered oscillator
output to V
DD
.
The crystal and oscillator components should be located as
close to the chip as practical to minimize pickup from other
signals. Coupling from the EXTERNAL OSClLLATOR INPUT
to the OSClLLATOR OUTPUT or INPUT can cause
undesirable shifts in oscillator frequency.
a
b
c
d
f
g
e
DP
LED overflow indicator connections: Overflow will be
indicated on the decimal point output of digit 8.
FIGURE 14. SEGMENT IDENTIFICATION AND DISPLAY FONT
DEVICE
CATHODE
ANODE
ICM7226A
Decimal Point
D8
ICM7226B
D8
Decimal Point
SIGNAL A
SIGNAL B
INPUT A
INPUT B
V
DD
N.O.
100K
1N914
V
DD
150K
1
0.1
μ
F
10K
10nF
1
1
1
2
2
V
SS
V
SS
V
SS
PRIME
FIGURE 15. PRIMING CIRCUIT, SIGNALS A AND B BOTH HIGH
OR LOW
DEVICE
TYPE
1
CD4049B Inverting Buffer
2
CD4070B Exclusive - OR
g
M
ω
2
C
IN
C
OUT
R
S
1
--------
+
2
=
where C
L
C
C
IN
OUT
------------+
=
f
MUX
f
10
4
×
2
------------------
=
f
MUX
f
10
3
×
2
------------------
=
------------------
6
OSC
2
------------------
5
OSC
ICM7226A, ICM7226B
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