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9-25
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V
DD
- V
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Input Voltage, Pins 43 - 48 (Note 1) . . (V
SS
- 0.3V) to (V
DD
+ 0.3V)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 2)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300
o
C
θ
JA
(
o
C/W)
50
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Due to the SCR structure inherent in junction-isolated CMOS devices. the circuit can be put in a latchup mode it large currents are injected
into device inputs or outputs. For this reason special care should be taken in a system with multiple power supplies to prevent voltages
being applied to inputs or outputs before power is applied. If only inputs are affected, latchup also can be prevented by limiting the current
into the input terminal to less than 1mA.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Temperature = -40
o
C to 85
o
C, V
DD
= 2.5V to 5.5V, V
SS
= 0V, Unless Otherwise Specified. Typical
Specifications Measured at Temperature = 25
o
C and V
DD
= 2.8V, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Operating Voltage, V
DD
Note 1
2.5
-
5.5
V
Operating Current, I
DD
All Inputs = V
DD
or GND, Note 2
V
DD
= 2.8V
-
1.0
10.0
μ
A
V
DD
= 5.5V
-
4.0
20.0
μ
A
INPUT CURRENT
C0 - C3, I
IN
All Inputs V
DD
or GND
V
DD
= 2.8V
Note 3
0.0
-
1
μ
A
S/S, I
SS
0.5
1.5
3.0
μ
A
DT, I
DT
40.0
-
110
μ
A
INPUT VOLTAGE
C0 - C3, DT, S/S
V
IL
-
-
0.3V
DD
V
V
IH
0.7V
DD
-
-
V
Segment Output Voltage
V
OL
I
OL
= 1
μ
A
-
-
0.8
V
V
OH
I
OH
= 1
μ
A
V
DD
- 0.8
-
-
V
Backplane Output Voltage
V
OL
I
OL
= 10
μ
A
-
-
0.8
V
V
OH
I
OH
= 10
μ
A
V
DD
- 0.8
-
-
V
OSCILLATOR STABILITY
Temperature = 25
o
C, V
DD
= 2.5V to 5.5V
Temperature = -40
o
C to 85
o
C, V
DD
= 2.5V to 5.5V
-
0.1
-
ppm
-
5
-
ppm
S/S PULSE WIDTH
High-Pass Filter (Modes 0 - 3), t
HP
5
-
10,000
μ
s
Debounce (Modes 4, 6, 8, 10), t
DE
10,000
-
-
μ
s
Without Debounce (Modes 5, 7, 9, 11), t
DE
5
-
-
μ
s
NOTES:
1. Internal reset to 00000 requires a maximum V
DD
rise time of 1
μ
s. Longer rise times at power-up may cause improper reset.
2. Operating current is measured with the LCD disconnected, and input current I
SS
and I
DT
supplied externally.
3. Inputs C0 - C3 are latched internally and draw no DC current after switching. During switching, a 90
μ
A peak current may be drawn for 10ns.
ICM7249